/* Generated automatically by the program `gencodes'
   from the machine description file `md'.  */

#ifndef GCC_INSN_CODES_H
#define GCC_INSN_CODES_H

enum insn_code {
  CODE_FOR_nothing = 0,

  CODE_FOR_x86_fnstsw_1 = 47,
  CODE_FOR_x86_sahf_1 = 48,
  CODE_FOR_kmovw = 84,
  CODE_FOR_movsi_insv_1 = 109,
#define CODE_FOR_movdi_insv_1 CODE_FOR_nothing
  CODE_FOR_swapxf = 119,
#define CODE_FOR_zero_extendqidi2 CODE_FOR_nothing
#define CODE_FOR_zero_extendhidi2 CODE_FOR_nothing
  CODE_FOR_zero_extendqisi2_and = 123,
  CODE_FOR_zero_extendhisi2_and = 124,
  CODE_FOR_zero_extendqihi2_and = 127,
  CODE_FOR_extendsidi2_1 = 129,
#define CODE_FOR_extendqidi2 CODE_FOR_nothing
#define CODE_FOR_extendhidi2 CODE_FOR_nothing
  CODE_FOR_extendhisi2 = 130,
  CODE_FOR_extendqisi2 = 131,
  CODE_FOR_extendqihi2 = 132,
  CODE_FOR_truncxfsf2_i387_noop = 146,
  CODE_FOR_truncxfdf2_i387_noop = 147,
  CODE_FOR_fix_truncsfsi_sse = 152,
#define CODE_FOR_fix_truncsfdi_sse CODE_FOR_nothing
  CODE_FOR_fix_truncdfsi_sse = 153,
#define CODE_FOR_fix_truncdfdi_sse CODE_FOR_nothing
  CODE_FOR_fix_trunchi_fisttp_i387_1 = 154,
  CODE_FOR_fix_truncsi_fisttp_i387_1 = 155,
  CODE_FOR_fix_truncdi_fisttp_i387_1 = 156,
  CODE_FOR_fix_trunchi_i387_fisttp = 157,
  CODE_FOR_fix_truncsi_i387_fisttp = 158,
  CODE_FOR_fix_truncdi_i387_fisttp = 159,
  CODE_FOR_fix_trunchi_i387_fisttp_with_temp = 160,
  CODE_FOR_fix_truncsi_i387_fisttp_with_temp = 161,
  CODE_FOR_fix_truncdi_i387_fisttp_with_temp = 162,
  CODE_FOR_fix_truncdi_i387 = 166,
  CODE_FOR_fix_truncdi_i387_with_temp = 167,
  CODE_FOR_fix_trunchi_i387 = 168,
  CODE_FOR_fix_truncsi_i387 = 169,
  CODE_FOR_fix_trunchi_i387_with_temp = 170,
  CODE_FOR_fix_truncsi_i387_with_temp = 171,
  CODE_FOR_x86_fnstcw_1 = 172,
  CODE_FOR_x86_fldcw_1 = 173,
  CODE_FOR_floathisf2 = 174,
  CODE_FOR_floathidf2 = 175,
  CODE_FOR_floathixf2 = 176,
  CODE_FOR_floatsixf2 = 177,
  CODE_FOR_floatdixf2 = 178,
  CODE_FOR_floatdisf2_i387_with_xmm = 185,
  CODE_FOR_floatdidf2_i387_with_xmm = 186,
  CODE_FOR_floatdixf2_i387_with_xmm = 187,
#define CODE_FOR_addsi_1_zext CODE_FOR_nothing
  CODE_FOR_addqi_ext_1 = 214,
  CODE_FOR_addqi3_carry = 252,
  CODE_FOR_addhi3_carry = 253,
  CODE_FOR_addsi3_carry = 254,
  CODE_FOR_adddi3_carry = 255,
  CODE_FOR_addcarrysi = 256,
  CODE_FOR_addcarrydi = 257,
  CODE_FOR_subqi3_carry = 258,
  CODE_FOR_subhi3_carry = 259,
  CODE_FOR_subsi3_carry = 260,
  CODE_FOR_subdi3_carry = 261,
  CODE_FOR_subborrowsi = 262,
  CODE_FOR_subborrowdi = 263,
  CODE_FOR_divmodsi4_1 = 288,
#define CODE_FOR_divmoddi4_1 CODE_FOR_nothing
  CODE_FOR_divmodhiqi3 = 293,
  CODE_FOR_udivmodsi4_1 = 294,
#define CODE_FOR_udivmoddi4_1 CODE_FOR_nothing
  CODE_FOR_udivmodhiqi3 = 300,
  CODE_FOR_kandnqi = 326,
  CODE_FOR_kandnhi = 327,
  CODE_FOR_andqi_ext_0 = 333,
  CODE_FOR_kxnorqi = 355,
  CODE_FOR_kxnorhi = 356,
  CODE_FOR_kxnorsi = 357,
  CODE_FOR_kxnordi = 358,
  CODE_FOR_kortestzhi = 359,
  CODE_FOR_kortestchi = 360,
  CODE_FOR_kunpckhi = 361,
  CODE_FOR_kunpcksi = 362,
  CODE_FOR_kunpckdi = 363,
  CODE_FOR_copysignsf3_const = 415,
  CODE_FOR_copysigndf3_const = 416,
  CODE_FOR_copysigntf3_const = 417,
  CODE_FOR_copysignsf3_var = 418,
  CODE_FOR_copysigndf3_var = 419,
  CODE_FOR_copysigntf3_var = 420,
#define CODE_FOR_x86_64_shld CODE_FOR_nothing
  CODE_FOR_x86_shld = 430,
#define CODE_FOR_x86_64_shrd CODE_FOR_nothing
  CODE_FOR_x86_shrd = 453,
#define CODE_FOR_ashrdi3_cvt CODE_FOR_nothing
  CODE_FOR_ashrsi3_cvt = 454,
  CODE_FOR_ix86_rotldi3_doubleword = 487,
#define CODE_FOR_ix86_rotlti3_doubleword CODE_FOR_nothing
  CODE_FOR_ix86_rotrdi3_doubleword = 488,
#define CODE_FOR_ix86_rotrti3_doubleword CODE_FOR_nothing
  CODE_FOR_setcc_sf_sse = 506,
  CODE_FOR_setcc_df_sse = 507,
  CODE_FOR_jump_bnd = 550,
  CODE_FOR_jump = 551,
  CODE_FOR_blockage = 574,
  CODE_FOR_prologue_use = 576,
  CODE_FOR_simple_return_internal = 577,
  CODE_FOR_simple_return_internal_long = 578,
  CODE_FOR_simple_return_pop_internal = 579,
  CODE_FOR_simple_return_indirect_internal = 580,
  CODE_FOR_nop = 581,
  CODE_FOR_nops = 582,
  CODE_FOR_pad = 583,
  CODE_FOR_set_got = 584,
  CODE_FOR_set_got_labelled = 585,
#define CODE_FOR_set_got_rex64 CODE_FOR_nothing
#define CODE_FOR_set_rip_rex64 CODE_FOR_nothing
  CODE_FOR_set_got_offset_rex64 = 586,
  CODE_FOR_eh_return_internal = 587,
  CODE_FOR_leave = 588,
#define CODE_FOR_leave_rex64 CODE_FOR_nothing
  CODE_FOR_split_stack_return = 589,
  CODE_FOR_ffssi2_no_cmove = 590,
  CODE_FOR_bmi_bextr_si = 604,
#define CODE_FOR_bmi_bextr_di CODE_FOR_nothing
  CODE_FOR_bmi2_pdep_si3 = 610,
#define CODE_FOR_bmi2_pdep_di3 CODE_FOR_nothing
  CODE_FOR_bmi2_pext_si3 = 611,
#define CODE_FOR_bmi2_pext_di3 CODE_FOR_nothing
  CODE_FOR_tbm_bextri_si = 612,
#define CODE_FOR_tbm_bextri_di CODE_FOR_nothing
#define CODE_FOR_bsr_rex64 CODE_FOR_nothing
  CODE_FOR_bsr = 622,
  CODE_FOR_bswaphi_lowpart = 632,
  CODE_FOR_paritydi2_cmp = 633,
  CODE_FOR_paritysi2_cmp = 634,
#define CODE_FOR_tls_initial_exec_64_sun CODE_FOR_nothing
  CODE_FOR_truncxfsf2_i387_noop_unspec = 686,
  CODE_FOR_truncxfdf2_i387_noop_unspec = 687,
  CODE_FOR_sqrtxf2 = 688,
  CODE_FOR_sqrt_extendsfxf2_i387 = 689,
  CODE_FOR_sqrt_extenddfxf2_i387 = 690,
  CODE_FOR_fpremxf4_i387 = 694,
  CODE_FOR_fprem1xf4_i387 = 695,
  CODE_FOR_sincosxf3 = 702,
  CODE_FOR_sincos_extendsfxf3_i387 = 703,
  CODE_FOR_sincos_extenddfxf3_i387 = 704,
  CODE_FOR_fptanxf4_i387 = 705,
  CODE_FOR_fptan_extendsfxf4_i387 = 706,
  CODE_FOR_fptan_extenddfxf4_i387 = 707,
  CODE_FOR_fpatan_extendsfxf3_i387 = 709,
  CODE_FOR_fpatan_extenddfxf3_i387 = 710,
  CODE_FOR_fyl2xxf3_i387 = 711,
  CODE_FOR_fyl2x_extendsfxf3_i387 = 712,
  CODE_FOR_fyl2x_extenddfxf3_i387 = 713,
  CODE_FOR_fyl2xp1xf3_i387 = 714,
  CODE_FOR_fyl2xp1_extendsfxf3_i387 = 715,
  CODE_FOR_fyl2xp1_extenddfxf3_i387 = 716,
  CODE_FOR_fxtractxf3_i387 = 717,
  CODE_FOR_fxtract_extendsfxf3_i387 = 718,
  CODE_FOR_fxtract_extenddfxf3_i387 = 719,
  CODE_FOR_fscalexf4_i387 = 721,
  CODE_FOR_sse4_1_roundsf2 = 722,
  CODE_FOR_sse4_1_rounddf2 = 723,
  CODE_FOR_rintxf2 = 724,
  CODE_FOR_fistdi2 = 726,
  CODE_FOR_fistdi2_with_temp = 727,
  CODE_FOR_fisthi2 = 730,
  CODE_FOR_fistsi2 = 731,
  CODE_FOR_fisthi2_with_temp = 732,
  CODE_FOR_fistsi2_with_temp = 733,
  CODE_FOR_frndintxf2_floor = 734,
  CODE_FOR_frndintxf2_ceil = 735,
  CODE_FOR_frndintxf2_trunc = 736,
  CODE_FOR_frndintxf2_floor_i387 = 737,
  CODE_FOR_frndintxf2_ceil_i387 = 738,
  CODE_FOR_frndintxf2_trunc_i387 = 739,
  CODE_FOR_frndintxf2_mask_pm = 740,
  CODE_FOR_frndintxf2_mask_pm_i387 = 741,
  CODE_FOR_fistdi2_floor = 748,
  CODE_FOR_fistdi2_ceil = 749,
  CODE_FOR_fistdi2_floor_with_temp = 750,
  CODE_FOR_fistdi2_ceil_with_temp = 751,
  CODE_FOR_fisthi2_floor = 752,
  CODE_FOR_fisthi2_ceil = 753,
  CODE_FOR_fistsi2_floor = 754,
  CODE_FOR_fistsi2_ceil = 755,
  CODE_FOR_fisthi2_floor_with_temp = 756,
  CODE_FOR_fisthi2_ceil_with_temp = 757,
  CODE_FOR_fistsi2_floor_with_temp = 758,
  CODE_FOR_fistsi2_ceil_with_temp = 759,
  CODE_FOR_fxamsf2_i387 = 760,
  CODE_FOR_fxamdf2_i387 = 761,
  CODE_FOR_fxamxf2_i387 = 762,
  CODE_FOR_fxamsf2_i387_with_temp = 763,
  CODE_FOR_fxamdf2_i387_with_temp = 764,
  CODE_FOR_movmsk_df = 765,
  CODE_FOR_cld = 766,
  CODE_FOR_smaxsf3 = 804,
  CODE_FOR_sminsf3 = 805,
  CODE_FOR_smaxdf3 = 806,
  CODE_FOR_smindf3 = 807,
  CODE_FOR_pro_epilogue_adjust_stack_si_add = 812,
  CODE_FOR_pro_epilogue_adjust_stack_di_add = 813,
  CODE_FOR_pro_epilogue_adjust_stack_si_sub = 814,
  CODE_FOR_pro_epilogue_adjust_stack_di_sub = 815,
  CODE_FOR_allocate_stack_worker_probe_si = 816,
  CODE_FOR_allocate_stack_worker_probe_di = 817,
  CODE_FOR_adjust_stack_and_probesi = 818,
  CODE_FOR_adjust_stack_and_probedi = 819,
  CODE_FOR_probe_stack_rangesi = 820,
  CODE_FOR_probe_stack_rangedi = 821,
  CODE_FOR_trap = 822,
  CODE_FOR_stack_protect_set_si = 826,
  CODE_FOR_stack_protect_set_di = 827,
  CODE_FOR_stack_tls_protect_set_si = 828,
  CODE_FOR_stack_tls_protect_set_di = 829,
  CODE_FOR_stack_protect_test_si = 830,
  CODE_FOR_stack_protect_test_di = 831,
  CODE_FOR_stack_tls_protect_test_si = 832,
  CODE_FOR_stack_tls_protect_test_di = 833,
  CODE_FOR_sse4_2_crc32qi = 834,
  CODE_FOR_sse4_2_crc32hi = 835,
  CODE_FOR_sse4_2_crc32si = 836,
#define CODE_FOR_sse4_2_crc32di CODE_FOR_nothing
  CODE_FOR_rdpmc = 837,
#define CODE_FOR_rdpmc_rex64 CODE_FOR_nothing
  CODE_FOR_rdtsc = 838,
#define CODE_FOR_rdtsc_rex64 CODE_FOR_nothing
  CODE_FOR_rdtscp = 839,
#define CODE_FOR_rdtscp_rex64 CODE_FOR_nothing
  CODE_FOR_fxsave = 840,
#define CODE_FOR_fxsave64 CODE_FOR_nothing
  CODE_FOR_fxrstor = 841,
#define CODE_FOR_fxrstor64 CODE_FOR_nothing
  CODE_FOR_xsave = 842,
  CODE_FOR_xsaveopt = 843,
  CODE_FOR_xsavec = 844,
  CODE_FOR_xsaves = 845,
#define CODE_FOR_xsave_rex64 CODE_FOR_nothing
#define CODE_FOR_xsaveopt_rex64 CODE_FOR_nothing
#define CODE_FOR_xsavec_rex64 CODE_FOR_nothing
#define CODE_FOR_xsaves_rex64 CODE_FOR_nothing
#define CODE_FOR_xsave64 CODE_FOR_nothing
#define CODE_FOR_xsaveopt64 CODE_FOR_nothing
#define CODE_FOR_xsavec64 CODE_FOR_nothing
#define CODE_FOR_xsaves64 CODE_FOR_nothing
  CODE_FOR_xrstor = 846,
  CODE_FOR_xrstors = 847,
#define CODE_FOR_xrstor_rex64 CODE_FOR_nothing
#define CODE_FOR_xrstors_rex64 CODE_FOR_nothing
#define CODE_FOR_xrstor64 CODE_FOR_nothing
#define CODE_FOR_xrstors64 CODE_FOR_nothing
  CODE_FOR_fnstenv = 848,
  CODE_FOR_fldenv = 849,
  CODE_FOR_fnstsw = 850,
  CODE_FOR_fnclex = 851,
  CODE_FOR_lwp_slwpcbsi = 854,
  CODE_FOR_lwp_slwpcbdi = 855,
#define CODE_FOR_rdfsbasesi CODE_FOR_nothing
#define CODE_FOR_rdgsbasesi CODE_FOR_nothing
#define CODE_FOR_rdfsbasedi CODE_FOR_nothing
#define CODE_FOR_rdgsbasedi CODE_FOR_nothing
#define CODE_FOR_wrfsbasesi CODE_FOR_nothing
#define CODE_FOR_wrgsbasesi CODE_FOR_nothing
#define CODE_FOR_wrfsbasedi CODE_FOR_nothing
#define CODE_FOR_wrgsbasedi CODE_FOR_nothing
  CODE_FOR_rdrandhi_1 = 858,
  CODE_FOR_rdrandsi_1 = 859,
#define CODE_FOR_rdranddi_1 CODE_FOR_nothing
  CODE_FOR_rdseedhi_1 = 860,
  CODE_FOR_rdseedsi_1 = 861,
#define CODE_FOR_rdseeddi_1 CODE_FOR_nothing
  CODE_FOR_xbegin_1 = 863,
  CODE_FOR_xend = 864,
  CODE_FOR_xabort = 865,
  CODE_FOR_xtest_1 = 866,
  CODE_FOR_pcommit = 867,
  CODE_FOR_clwb = 868,
  CODE_FOR_clflushopt = 869,
  CODE_FOR_mwaitx = 870,
  CODE_FOR_monitorx_si = 871,
  CODE_FOR_monitorx_di = 872,
  CODE_FOR_move_size_reloc_si = 887,
#define CODE_FOR_move_size_reloc_di CODE_FOR_nothing
  CODE_FOR_sse_movntq = 893,
  CODE_FOR_mmx_rcpv2sf2 = 901,
  CODE_FOR_mmx_rcpit1v2sf3 = 902,
  CODE_FOR_mmx_rcpit2v2sf3 = 903,
  CODE_FOR_mmx_rsqrtv2sf2 = 904,
  CODE_FOR_mmx_rsqit1v2sf3 = 905,
  CODE_FOR_mmx_haddv2sf3 = 906,
  CODE_FOR_mmx_hsubv2sf3 = 907,
  CODE_FOR_mmx_addsubv2sf3 = 908,
  CODE_FOR_mmx_gtv2sf3 = 910,
  CODE_FOR_mmx_gev2sf3 = 911,
  CODE_FOR_mmx_pf2id = 912,
  CODE_FOR_mmx_pf2iw = 913,
  CODE_FOR_mmx_pi2fw = 914,
  CODE_FOR_mmx_floatv2si2 = 915,
  CODE_FOR_mmx_pswapdv2sf2 = 916,
  CODE_FOR_mmx_ashrv4hi3 = 947,
  CODE_FOR_mmx_ashrv2si3 = 948,
  CODE_FOR_mmx_ashlv4hi3 = 949,
  CODE_FOR_mmx_lshrv4hi3 = 950,
  CODE_FOR_mmx_ashlv2si3 = 951,
  CODE_FOR_mmx_lshrv2si3 = 952,
  CODE_FOR_mmx_ashlv1di3 = 953,
  CODE_FOR_mmx_lshrv1di3 = 954,
  CODE_FOR_mmx_gtv8qi3 = 958,
  CODE_FOR_mmx_gtv4hi3 = 959,
  CODE_FOR_mmx_gtv2si3 = 960,
  CODE_FOR_mmx_andnotv8qi3 = 961,
  CODE_FOR_mmx_andnotv4hi3 = 962,
  CODE_FOR_mmx_andnotv2si3 = 963,
  CODE_FOR_mmx_packsswb = 973,
  CODE_FOR_mmx_packssdw = 974,
  CODE_FOR_mmx_packuswb = 975,
  CODE_FOR_mmx_punpckhbw = 976,
  CODE_FOR_mmx_punpcklbw = 977,
  CODE_FOR_mmx_punpckhwd = 978,
  CODE_FOR_mmx_punpcklwd = 979,
  CODE_FOR_mmx_punpckhdq = 980,
  CODE_FOR_mmx_punpckldq = 981,
  CODE_FOR_mmx_pextrw = 983,
  CODE_FOR_mmx_pshufw_1 = 984,
  CODE_FOR_mmx_pswapdv2si2 = 985,
  CODE_FOR_mmx_psadbw = 993,
  CODE_FOR_mmx_pmovmskb = 994,
  CODE_FOR_avx512f_loadv16si_mask = 1020,
  CODE_FOR_avx512vl_loadv8si_mask = 1021,
  CODE_FOR_avx512vl_loadv4si_mask = 1022,
  CODE_FOR_avx512f_loadv8di_mask = 1023,
  CODE_FOR_avx512vl_loadv4di_mask = 1024,
  CODE_FOR_avx512vl_loadv2di_mask = 1025,
  CODE_FOR_avx512f_loadv16sf_mask = 1026,
  CODE_FOR_avx512vl_loadv8sf_mask = 1027,
  CODE_FOR_avx512vl_loadv4sf_mask = 1028,
  CODE_FOR_avx512f_loadv8df_mask = 1029,
  CODE_FOR_avx512vl_loadv4df_mask = 1030,
  CODE_FOR_avx512vl_loadv2df_mask = 1031,
  CODE_FOR_avx512bw_loadv64qi_mask = 1032,
  CODE_FOR_avx512vl_loadv16qi_mask = 1033,
  CODE_FOR_avx512vl_loadv32qi_mask = 1034,
  CODE_FOR_avx512bw_loadv32hi_mask = 1035,
  CODE_FOR_avx512vl_loadv16hi_mask = 1036,
  CODE_FOR_avx512vl_loadv8hi_mask = 1037,
  CODE_FOR_avx512f_blendmv16si = 1038,
  CODE_FOR_avx512vl_blendmv8si = 1039,
  CODE_FOR_avx512vl_blendmv4si = 1040,
  CODE_FOR_avx512f_blendmv8di = 1041,
  CODE_FOR_avx512vl_blendmv4di = 1042,
  CODE_FOR_avx512vl_blendmv2di = 1043,
  CODE_FOR_avx512f_blendmv16sf = 1044,
  CODE_FOR_avx512vl_blendmv8sf = 1045,
  CODE_FOR_avx512vl_blendmv4sf = 1046,
  CODE_FOR_avx512f_blendmv8df = 1047,
  CODE_FOR_avx512vl_blendmv4df = 1048,
  CODE_FOR_avx512vl_blendmv2df = 1049,
  CODE_FOR_avx512bw_blendmv64qi = 1050,
  CODE_FOR_avx512vl_blendmv16qi = 1051,
  CODE_FOR_avx512vl_blendmv32qi = 1052,
  CODE_FOR_avx512bw_blendmv32hi = 1053,
  CODE_FOR_avx512vl_blendmv16hi = 1054,
  CODE_FOR_avx512vl_blendmv8hi = 1055,
  CODE_FOR_avx512f_storev16si_mask = 1056,
  CODE_FOR_avx512vl_storev8si_mask = 1057,
  CODE_FOR_avx512vl_storev4si_mask = 1058,
  CODE_FOR_avx512f_storev8di_mask = 1059,
  CODE_FOR_avx512vl_storev4di_mask = 1060,
  CODE_FOR_avx512vl_storev2di_mask = 1061,
  CODE_FOR_avx512f_storev16sf_mask = 1062,
  CODE_FOR_avx512vl_storev8sf_mask = 1063,
  CODE_FOR_avx512vl_storev4sf_mask = 1064,
  CODE_FOR_avx512f_storev8df_mask = 1065,
  CODE_FOR_avx512vl_storev4df_mask = 1066,
  CODE_FOR_avx512vl_storev2df_mask = 1067,
  CODE_FOR_avx512bw_storev64qi_mask = 1068,
  CODE_FOR_avx512vl_storev16qi_mask = 1069,
  CODE_FOR_avx512vl_storev32qi_mask = 1070,
  CODE_FOR_avx512bw_storev32hi_mask = 1071,
  CODE_FOR_avx512vl_storev16hi_mask = 1072,
  CODE_FOR_avx512vl_storev8hi_mask = 1073,
  CODE_FOR_sse2_movq128 = 1074,
  CODE_FOR_movdi_to_sse = 1075,
  CODE_FOR_avx512f_storeups512 = 1088,
  CODE_FOR_avx_storeups256 = 1089,
  CODE_FOR_sse_storeups = 1090,
  CODE_FOR_avx512f_storeupd512 = 1091,
  CODE_FOR_avx_storeupd256 = 1092,
  CODE_FOR_sse2_storeupd = 1093,
  CODE_FOR_avx512f_storeups512_mask = 1094,
  CODE_FOR_avx512vl_storeups256_mask = 1095,
  CODE_FOR_avx512vl_storeups_mask = 1096,
  CODE_FOR_avx512f_storeupd512_mask = 1097,
  CODE_FOR_avx512vl_storeupd256_mask = 1098,
  CODE_FOR_avx512vl_storeupd_mask = 1099,
  CODE_FOR_avx_storedquv32qi = 1124,
  CODE_FOR_sse2_storedquv16qi = 1125,
  CODE_FOR_avx512f_storedquv64qi = 1126,
  CODE_FOR_avx512bw_storedquv32hi = 1127,
  CODE_FOR_avx512vl_storedquv8hi = 1128,
  CODE_FOR_avx512vl_storedquv16hi = 1129,
  CODE_FOR_avx512f_storedquv16si = 1130,
  CODE_FOR_avx_storedquv8si = 1131,
  CODE_FOR_sse2_storedquv4si = 1132,
  CODE_FOR_avx512f_storedquv8di = 1133,
  CODE_FOR_avx512vl_storedquv4di = 1134,
  CODE_FOR_avx512vl_storedquv2di = 1135,
  CODE_FOR_avx512f_storedquv16si_mask = 1136,
  CODE_FOR_avx512vl_storedquv8si_mask = 1137,
  CODE_FOR_avx512vl_storedquv4si_mask = 1138,
  CODE_FOR_avx512f_storedquv8di_mask = 1139,
  CODE_FOR_avx512vl_storedquv4di_mask = 1140,
  CODE_FOR_avx512vl_storedquv2di_mask = 1141,
  CODE_FOR_avx512bw_storedquv64qi_mask = 1142,
  CODE_FOR_avx512vl_storedquv16qi_mask = 1143,
  CODE_FOR_avx512vl_storedquv32qi_mask = 1144,
  CODE_FOR_avx512bw_storedquv32hi_mask = 1145,
  CODE_FOR_avx512vl_storedquv16hi_mask = 1146,
  CODE_FOR_avx512vl_storedquv8hi_mask = 1147,
  CODE_FOR_avx_lddqu256 = 1148,
  CODE_FOR_sse3_lddqu = 1149,
  CODE_FOR_sse2_movntisi = 1150,
#define CODE_FOR_sse2_movntidi CODE_FOR_nothing
  CODE_FOR_avx512f_movntv16sf = 1151,
  CODE_FOR_avx_movntv8sf = 1152,
  CODE_FOR_sse_movntv4sf = 1153,
  CODE_FOR_avx512f_movntv8df = 1154,
  CODE_FOR_avx_movntv4df = 1155,
  CODE_FOR_sse2_movntv2df = 1156,
  CODE_FOR_avx512f_movntv8di = 1157,
  CODE_FOR_avx_movntv4di = 1158,
  CODE_FOR_sse2_movntv2di = 1159,
  CODE_FOR_sse_vmaddv4sf3 = 1214,
  CODE_FOR_sse_vmaddv4sf3_round = 1215,
  CODE_FOR_sse_vmsubv4sf3 = 1216,
  CODE_FOR_sse_vmsubv4sf3_round = 1217,
  CODE_FOR_sse2_vmaddv2df3 = 1218,
  CODE_FOR_sse2_vmaddv2df3_round = 1219,
  CODE_FOR_sse2_vmsubv2df3 = 1220,
  CODE_FOR_sse2_vmsubv2df3_round = 1221,
  CODE_FOR_sse_vmmulv4sf3 = 1246,
  CODE_FOR_sse_vmmulv4sf3_round = 1247,
  CODE_FOR_sse_vmdivv4sf3 = 1248,
  CODE_FOR_sse_vmdivv4sf3_round = 1249,
  CODE_FOR_sse2_vmmulv2df3 = 1250,
  CODE_FOR_sse2_vmmulv2df3_round = 1251,
  CODE_FOR_sse2_vmdivv2df3 = 1252,
  CODE_FOR_sse2_vmdivv2df3_round = 1253,
  CODE_FOR_avx512f_divv16sf3 = 1254,
  CODE_FOR_avx512f_divv16sf3_round = 1255,
  CODE_FOR_avx512f_divv16sf3_mask = 1256,
  CODE_FOR_avx512f_divv16sf3_mask_round = 1257,
  CODE_FOR_avx_divv8sf3 = 1258,
#define CODE_FOR_avx_divv8sf3_round CODE_FOR_nothing
  CODE_FOR_avx_divv8sf3_mask = 1259,
#define CODE_FOR_avx_divv8sf3_mask_round CODE_FOR_nothing
  CODE_FOR_sse_divv4sf3 = 1260,
#define CODE_FOR_sse_divv4sf3_round CODE_FOR_nothing
  CODE_FOR_sse_divv4sf3_mask = 1261,
#define CODE_FOR_sse_divv4sf3_mask_round CODE_FOR_nothing
  CODE_FOR_avx512f_divv8df3 = 1262,
  CODE_FOR_avx512f_divv8df3_round = 1263,
  CODE_FOR_avx512f_divv8df3_mask = 1264,
  CODE_FOR_avx512f_divv8df3_mask_round = 1265,
  CODE_FOR_avx_divv4df3 = 1266,
#define CODE_FOR_avx_divv4df3_round CODE_FOR_nothing
  CODE_FOR_avx_divv4df3_mask = 1267,
#define CODE_FOR_avx_divv4df3_mask_round CODE_FOR_nothing
  CODE_FOR_sse2_divv2df3 = 1268,
#define CODE_FOR_sse2_divv2df3_round CODE_FOR_nothing
  CODE_FOR_sse2_divv2df3_mask = 1269,
#define CODE_FOR_sse2_divv2df3_mask_round CODE_FOR_nothing
  CODE_FOR_avx_rcpv8sf2 = 1270,
  CODE_FOR_sse_rcpv4sf2 = 1271,
  CODE_FOR_sse_vmrcpv4sf2 = 1272,
  CODE_FOR_rcp14v16sf_mask = 1274,
  CODE_FOR_rcp14v8sf_mask = 1276,
  CODE_FOR_rcp14v4sf_mask = 1278,
  CODE_FOR_rcp14v8df_mask = 1280,
  CODE_FOR_rcp14v4df_mask = 1282,
  CODE_FOR_rcp14v2df_mask = 1284,
  CODE_FOR_srcp14v4sf = 1285,
  CODE_FOR_srcp14v2df = 1286,
  CODE_FOR_avx512f_sqrtv16sf2 = 1287,
  CODE_FOR_avx512f_sqrtv16sf2_round = 1288,
  CODE_FOR_avx512f_sqrtv16sf2_mask = 1289,
  CODE_FOR_avx512f_sqrtv16sf2_mask_round = 1290,
  CODE_FOR_avx_sqrtv8sf2 = 1291,
#define CODE_FOR_avx_sqrtv8sf2_round CODE_FOR_nothing
  CODE_FOR_avx_sqrtv8sf2_mask = 1292,
#define CODE_FOR_avx_sqrtv8sf2_mask_round CODE_FOR_nothing
  CODE_FOR_sse_sqrtv4sf2 = 1293,
#define CODE_FOR_sse_sqrtv4sf2_round CODE_FOR_nothing
  CODE_FOR_sse_sqrtv4sf2_mask = 1294,
#define CODE_FOR_sse_sqrtv4sf2_mask_round CODE_FOR_nothing
  CODE_FOR_avx512f_sqrtv8df2 = 1295,
  CODE_FOR_avx512f_sqrtv8df2_round = 1296,
  CODE_FOR_avx512f_sqrtv8df2_mask = 1297,
  CODE_FOR_avx512f_sqrtv8df2_mask_round = 1298,
  CODE_FOR_avx_sqrtv4df2 = 1299,
#define CODE_FOR_avx_sqrtv4df2_round CODE_FOR_nothing
  CODE_FOR_avx_sqrtv4df2_mask = 1300,
#define CODE_FOR_avx_sqrtv4df2_mask_round CODE_FOR_nothing
  CODE_FOR_sse2_sqrtv2df2 = 1301,
#define CODE_FOR_sse2_sqrtv2df2_round CODE_FOR_nothing
  CODE_FOR_sse2_sqrtv2df2_mask = 1302,
#define CODE_FOR_sse2_sqrtv2df2_mask_round CODE_FOR_nothing
  CODE_FOR_sse_vmsqrtv4sf2 = 1303,
  CODE_FOR_sse_vmsqrtv4sf2_round = 1304,
  CODE_FOR_sse2_vmsqrtv2df2 = 1305,
  CODE_FOR_sse2_vmsqrtv2df2_round = 1306,
  CODE_FOR_avx_rsqrtv8sf2 = 1307,
  CODE_FOR_sse_rsqrtv4sf2 = 1308,
  CODE_FOR_rsqrt14v16sf_mask = 1310,
  CODE_FOR_rsqrt14v8sf_mask = 1312,
  CODE_FOR_rsqrt14v4sf_mask = 1314,
  CODE_FOR_rsqrt14v8df_mask = 1316,
  CODE_FOR_rsqrt14v4df_mask = 1318,
  CODE_FOR_rsqrt14v2df_mask = 1320,
  CODE_FOR_rsqrt14v4sf = 1321,
  CODE_FOR_rsqrt14v2df = 1322,
  CODE_FOR_sse_vmrsqrtv4sf2 = 1323,
  CODE_FOR_sse_vmsmaxv4sf3 = 1404,
  CODE_FOR_sse_vmsmaxv4sf3_round = 1405,
  CODE_FOR_sse_vmsminv4sf3 = 1406,
  CODE_FOR_sse_vmsminv4sf3_round = 1407,
  CODE_FOR_sse2_vmsmaxv2df3 = 1408,
  CODE_FOR_sse2_vmsmaxv2df3_round = 1409,
  CODE_FOR_sse2_vmsminv2df3 = 1410,
  CODE_FOR_sse2_vmsminv2df3_round = 1411,
  CODE_FOR_avx_addsubv4df3 = 1424,
  CODE_FOR_sse3_addsubv2df3 = 1425,
  CODE_FOR_avx_addsubv8sf3 = 1426,
  CODE_FOR_sse3_addsubv4sf3 = 1427,
  CODE_FOR_avx_haddv4df3 = 1428,
  CODE_FOR_avx_hsubv4df3 = 1429,
  CODE_FOR_sse3_hsubv2df3 = 1431,
  CODE_FOR_avx_haddv8sf3 = 1434,
  CODE_FOR_avx_hsubv8sf3 = 1435,
  CODE_FOR_sse3_haddv4sf3 = 1436,
  CODE_FOR_sse3_hsubv4sf3 = 1437,
  CODE_FOR_reducepv16sf_mask = 1439,
  CODE_FOR_reducepv8sf_mask = 1441,
  CODE_FOR_reducepv4sf_mask = 1443,
  CODE_FOR_reducepv8df_mask = 1445,
  CODE_FOR_reducepv4df_mask = 1447,
  CODE_FOR_reducepv2df_mask = 1449,
  CODE_FOR_reducesv4sf = 1450,
  CODE_FOR_reducesv2df = 1451,
  CODE_FOR_avx_cmpv8sf3 = 1452,
  CODE_FOR_avx_cmpv4sf3 = 1453,
  CODE_FOR_avx_cmpv4df3 = 1454,
  CODE_FOR_avx_cmpv2df3 = 1455,
  CODE_FOR_avx_vmcmpv4sf3 = 1456,
  CODE_FOR_avx_vmcmpv2df3 = 1457,
  CODE_FOR_avx_maskcmpv8sf3 = 1462,
  CODE_FOR_sse_maskcmpv4sf3 = 1463,
  CODE_FOR_avx_maskcmpv4df3 = 1464,
  CODE_FOR_sse2_maskcmpv2df3 = 1465,
  CODE_FOR_sse_vmmaskcmpv4sf3 = 1466,
  CODE_FOR_sse2_vmmaskcmpv2df3 = 1467,
  CODE_FOR_avx512f_cmpv16si3 = 1468,
  CODE_FOR_avx512f_cmpv16si3_mask = 1469,
  CODE_FOR_avx512f_cmpv16si3_round = 1470,
  CODE_FOR_avx512f_cmpv16si3_mask_round = 1471,
  CODE_FOR_avx512vl_cmpv8si3 = 1472,
  CODE_FOR_avx512vl_cmpv8si3_mask = 1473,
#define CODE_FOR_avx512vl_cmpv8si3_round CODE_FOR_nothing
#define CODE_FOR_avx512vl_cmpv8si3_mask_round CODE_FOR_nothing
  CODE_FOR_avx512vl_cmpv4si3 = 1474,
  CODE_FOR_avx512vl_cmpv4si3_mask = 1475,
#define CODE_FOR_avx512vl_cmpv4si3_round CODE_FOR_nothing
#define CODE_FOR_avx512vl_cmpv4si3_mask_round CODE_FOR_nothing
  CODE_FOR_avx512f_cmpv8di3 = 1476,
  CODE_FOR_avx512f_cmpv8di3_mask = 1477,
  CODE_FOR_avx512f_cmpv8di3_round = 1478,
  CODE_FOR_avx512f_cmpv8di3_mask_round = 1479,
  CODE_FOR_avx512vl_cmpv4di3 = 1480,
  CODE_FOR_avx512vl_cmpv4di3_mask = 1481,
#define CODE_FOR_avx512vl_cmpv4di3_round CODE_FOR_nothing
#define CODE_FOR_avx512vl_cmpv4di3_mask_round CODE_FOR_nothing
  CODE_FOR_avx512vl_cmpv2di3 = 1482,
  CODE_FOR_avx512vl_cmpv2di3_mask = 1483,
#define CODE_FOR_avx512vl_cmpv2di3_round CODE_FOR_nothing
#define CODE_FOR_avx512vl_cmpv2di3_mask_round CODE_FOR_nothing
  CODE_FOR_avx512f_cmpv16sf3 = 1484,
  CODE_FOR_avx512f_cmpv16sf3_mask = 1485,
  CODE_FOR_avx512f_cmpv16sf3_round = 1486,
  CODE_FOR_avx512f_cmpv16sf3_mask_round = 1487,
  CODE_FOR_avx512vl_cmpv8sf3 = 1488,
  CODE_FOR_avx512vl_cmpv8sf3_mask = 1489,
#define CODE_FOR_avx512vl_cmpv8sf3_round CODE_FOR_nothing
#define CODE_FOR_avx512vl_cmpv8sf3_mask_round CODE_FOR_nothing
  CODE_FOR_avx512vl_cmpv4sf3 = 1490,
  CODE_FOR_avx512vl_cmpv4sf3_mask = 1491,
#define CODE_FOR_avx512vl_cmpv4sf3_round CODE_FOR_nothing
#define CODE_FOR_avx512vl_cmpv4sf3_mask_round CODE_FOR_nothing
  CODE_FOR_avx512f_cmpv8df3 = 1492,
  CODE_FOR_avx512f_cmpv8df3_mask = 1493,
  CODE_FOR_avx512f_cmpv8df3_round = 1494,
  CODE_FOR_avx512f_cmpv8df3_mask_round = 1495,
  CODE_FOR_avx512vl_cmpv4df3 = 1496,
  CODE_FOR_avx512vl_cmpv4df3_mask = 1497,
#define CODE_FOR_avx512vl_cmpv4df3_round CODE_FOR_nothing
#define CODE_FOR_avx512vl_cmpv4df3_mask_round CODE_FOR_nothing
  CODE_FOR_avx512vl_cmpv2df3 = 1498,
  CODE_FOR_avx512vl_cmpv2df3_mask = 1499,
#define CODE_FOR_avx512vl_cmpv2df3_round CODE_FOR_nothing
#define CODE_FOR_avx512vl_cmpv2df3_mask_round CODE_FOR_nothing
  CODE_FOR_avx512bw_cmpv64qi3 = 1500,
  CODE_FOR_avx512bw_cmpv64qi3_mask = 1501,
  CODE_FOR_avx512vl_cmpv16qi3 = 1502,
  CODE_FOR_avx512vl_cmpv16qi3_mask = 1503,
  CODE_FOR_avx512vl_cmpv32qi3 = 1504,
  CODE_FOR_avx512vl_cmpv32qi3_mask = 1505,
  CODE_FOR_avx512bw_cmpv32hi3 = 1506,
  CODE_FOR_avx512bw_cmpv32hi3_mask = 1507,
  CODE_FOR_avx512vl_cmpv16hi3 = 1508,
  CODE_FOR_avx512vl_cmpv16hi3_mask = 1509,
  CODE_FOR_avx512vl_cmpv8hi3 = 1510,
  CODE_FOR_avx512vl_cmpv8hi3_mask = 1511,
  CODE_FOR_avx512bw_ucmpv64qi3 = 1512,
  CODE_FOR_avx512bw_ucmpv64qi3_mask = 1513,
  CODE_FOR_avx512vl_ucmpv16qi3 = 1514,
  CODE_FOR_avx512vl_ucmpv16qi3_mask = 1515,
  CODE_FOR_avx512vl_ucmpv32qi3 = 1516,
  CODE_FOR_avx512vl_ucmpv32qi3_mask = 1517,
  CODE_FOR_avx512bw_ucmpv32hi3 = 1518,
  CODE_FOR_avx512bw_ucmpv32hi3_mask = 1519,
  CODE_FOR_avx512vl_ucmpv16hi3 = 1520,
  CODE_FOR_avx512vl_ucmpv16hi3_mask = 1521,
  CODE_FOR_avx512vl_ucmpv8hi3 = 1522,
  CODE_FOR_avx512vl_ucmpv8hi3_mask = 1523,
  CODE_FOR_avx512f_ucmpv16si3 = 1524,
  CODE_FOR_avx512f_ucmpv16si3_mask = 1525,
  CODE_FOR_avx512vl_ucmpv8si3 = 1526,
  CODE_FOR_avx512vl_ucmpv8si3_mask = 1527,
  CODE_FOR_avx512vl_ucmpv4si3 = 1528,
  CODE_FOR_avx512vl_ucmpv4si3_mask = 1529,
  CODE_FOR_avx512f_ucmpv8di3 = 1530,
  CODE_FOR_avx512f_ucmpv8di3_mask = 1531,
  CODE_FOR_avx512vl_ucmpv4di3 = 1532,
  CODE_FOR_avx512vl_ucmpv4di3_mask = 1533,
  CODE_FOR_avx512vl_ucmpv2di3 = 1534,
  CODE_FOR_avx512vl_ucmpv2di3_mask = 1535,
  CODE_FOR_avx512f_vmcmpv4sf3 = 1536,
  CODE_FOR_avx512f_vmcmpv4sf3_round = 1537,
  CODE_FOR_avx512f_vmcmpv2df3 = 1538,
  CODE_FOR_avx512f_vmcmpv2df3_round = 1539,
  CODE_FOR_avx512f_vmcmpv4sf3_mask = 1540,
  CODE_FOR_avx512f_vmcmpv4sf3_mask_round = 1541,
  CODE_FOR_avx512f_vmcmpv2df3_mask = 1542,
  CODE_FOR_avx512f_vmcmpv2df3_mask_round = 1543,
  CODE_FOR_avx512f_maskcmpv16sf3 = 1544,
  CODE_FOR_avx512f_maskcmpv8sf3 = 1545,
  CODE_FOR_avx512f_maskcmpv4sf3 = 1546,
  CODE_FOR_avx512f_maskcmpv8df3 = 1547,
  CODE_FOR_avx512f_maskcmpv4df3 = 1548,
  CODE_FOR_avx512f_maskcmpv2df3 = 1549,
  CODE_FOR_sse_comi = 1550,
  CODE_FOR_sse_comi_round = 1551,
  CODE_FOR_sse2_comi = 1552,
  CODE_FOR_sse2_comi_round = 1553,
  CODE_FOR_sse_ucomi = 1554,
  CODE_FOR_sse_ucomi_round = 1555,
  CODE_FOR_sse2_ucomi = 1556,
  CODE_FOR_sse2_ucomi_round = 1557,
  CODE_FOR_avx_andnotv8sf3 = 1558,
  CODE_FOR_avx_andnotv8sf3_mask = 1559,
  CODE_FOR_sse_andnotv4sf3 = 1560,
  CODE_FOR_sse_andnotv4sf3_mask = 1561,
  CODE_FOR_avx_andnotv4df3 = 1562,
  CODE_FOR_avx_andnotv4df3_mask = 1563,
  CODE_FOR_sse2_andnotv2df3 = 1564,
  CODE_FOR_sse2_andnotv2df3_mask = 1565,
  CODE_FOR_avx512f_andnotv16sf3 = 1566,
  CODE_FOR_avx512f_andnotv16sf3_mask = 1567,
  CODE_FOR_avx512f_andnotv8df3 = 1568,
  CODE_FOR_avx512f_andnotv8df3_mask = 1569,
  CODE_FOR_fma_fmadd_v16sf_maskz_1 = 1627,
  CODE_FOR_fma_fmadd_v16sf_maskz_1_round = 1628,
  CODE_FOR_fma_fmadd_v8sf_maskz_1 = 1630,
#define CODE_FOR_fma_fmadd_v8sf_maskz_1_round CODE_FOR_nothing
  CODE_FOR_fma_fmadd_v4sf_maskz_1 = 1632,
#define CODE_FOR_fma_fmadd_v4sf_maskz_1_round CODE_FOR_nothing
  CODE_FOR_fma_fmadd_v8df_maskz_1 = 1636,
  CODE_FOR_fma_fmadd_v8df_maskz_1_round = 1637,
  CODE_FOR_fma_fmadd_v4df_maskz_1 = 1639,
#define CODE_FOR_fma_fmadd_v4df_maskz_1_round CODE_FOR_nothing
  CODE_FOR_fma_fmadd_v2df_maskz_1 = 1641,
#define CODE_FOR_fma_fmadd_v2df_maskz_1_round CODE_FOR_nothing
  CODE_FOR_avx512f_fmadd_v16sf_mask = 1642,
  CODE_FOR_avx512f_fmadd_v16sf_mask_round = 1643,
  CODE_FOR_avx512vl_fmadd_v8sf_mask = 1644,
#define CODE_FOR_avx512vl_fmadd_v8sf_mask_round CODE_FOR_nothing
  CODE_FOR_avx512vl_fmadd_v4sf_mask = 1645,
#define CODE_FOR_avx512vl_fmadd_v4sf_mask_round CODE_FOR_nothing
  CODE_FOR_avx512f_fmadd_v8df_mask = 1646,
  CODE_FOR_avx512f_fmadd_v8df_mask_round = 1647,
  CODE_FOR_avx512vl_fmadd_v4df_mask = 1648,
#define CODE_FOR_avx512vl_fmadd_v4df_mask_round CODE_FOR_nothing
  CODE_FOR_avx512vl_fmadd_v2df_mask = 1649,
#define CODE_FOR_avx512vl_fmadd_v2df_mask_round CODE_FOR_nothing
  CODE_FOR_avx512f_fmadd_v16sf_mask3 = 1650,
  CODE_FOR_avx512f_fmadd_v16sf_mask3_round = 1651,
  CODE_FOR_avx512vl_fmadd_v8sf_mask3 = 1652,
  CODE_FOR_avx512vl_fmadd_v8sf_mask3_round = 1653,
  CODE_FOR_avx512vl_fmadd_v4sf_mask3 = 1654,
  CODE_FOR_avx512vl_fmadd_v4sf_mask3_round = 1655,
  CODE_FOR_avx512f_fmadd_v8df_mask3 = 1656,
  CODE_FOR_avx512f_fmadd_v8df_mask3_round = 1657,
  CODE_FOR_avx512vl_fmadd_v4df_mask3 = 1658,
  CODE_FOR_avx512vl_fmadd_v4df_mask3_round = 1659,
  CODE_FOR_avx512vl_fmadd_v2df_mask3 = 1660,
  CODE_FOR_avx512vl_fmadd_v2df_mask3_round = 1661,
  CODE_FOR_fma_fmsub_v16sf_maskz_1 = 1671,
  CODE_FOR_fma_fmsub_v16sf_maskz_1_round = 1672,
  CODE_FOR_fma_fmsub_v8sf_maskz_1 = 1674,
#define CODE_FOR_fma_fmsub_v8sf_maskz_1_round CODE_FOR_nothing
  CODE_FOR_fma_fmsub_v4sf_maskz_1 = 1676,
#define CODE_FOR_fma_fmsub_v4sf_maskz_1_round CODE_FOR_nothing
  CODE_FOR_fma_fmsub_v8df_maskz_1 = 1680,
  CODE_FOR_fma_fmsub_v8df_maskz_1_round = 1681,
  CODE_FOR_fma_fmsub_v4df_maskz_1 = 1683,
#define CODE_FOR_fma_fmsub_v4df_maskz_1_round CODE_FOR_nothing
  CODE_FOR_fma_fmsub_v2df_maskz_1 = 1685,
#define CODE_FOR_fma_fmsub_v2df_maskz_1_round CODE_FOR_nothing
  CODE_FOR_avx512f_fmsub_v16sf_mask = 1686,
  CODE_FOR_avx512f_fmsub_v16sf_mask_round = 1687,
  CODE_FOR_avx512vl_fmsub_v8sf_mask = 1688,
  CODE_FOR_avx512vl_fmsub_v8sf_mask_round = 1689,
  CODE_FOR_avx512vl_fmsub_v4sf_mask = 1690,
  CODE_FOR_avx512vl_fmsub_v4sf_mask_round = 1691,
  CODE_FOR_avx512f_fmsub_v8df_mask = 1692,
  CODE_FOR_avx512f_fmsub_v8df_mask_round = 1693,
  CODE_FOR_avx512vl_fmsub_v4df_mask = 1694,
  CODE_FOR_avx512vl_fmsub_v4df_mask_round = 1695,
  CODE_FOR_avx512vl_fmsub_v2df_mask = 1696,
  CODE_FOR_avx512vl_fmsub_v2df_mask_round = 1697,
  CODE_FOR_avx512f_fmsub_v16sf_mask3 = 1698,
  CODE_FOR_avx512f_fmsub_v16sf_mask3_round = 1699,
  CODE_FOR_avx512vl_fmsub_v8sf_mask3 = 1700,
#define CODE_FOR_avx512vl_fmsub_v8sf_mask3_round CODE_FOR_nothing
  CODE_FOR_avx512vl_fmsub_v4sf_mask3 = 1701,
#define CODE_FOR_avx512vl_fmsub_v4sf_mask3_round CODE_FOR_nothing
  CODE_FOR_avx512f_fmsub_v8df_mask3 = 1702,
  CODE_FOR_avx512f_fmsub_v8df_mask3_round = 1703,
  CODE_FOR_avx512vl_fmsub_v4df_mask3 = 1704,
#define CODE_FOR_avx512vl_fmsub_v4df_mask3_round CODE_FOR_nothing
  CODE_FOR_avx512vl_fmsub_v2df_mask3 = 1705,
#define CODE_FOR_avx512vl_fmsub_v2df_mask3_round CODE_FOR_nothing
  CODE_FOR_fma_fnmadd_v16sf_maskz_1 = 1715,
  CODE_FOR_fma_fnmadd_v16sf_maskz_1_round = 1716,
  CODE_FOR_fma_fnmadd_v8sf_maskz_1 = 1718,
#define CODE_FOR_fma_fnmadd_v8sf_maskz_1_round CODE_FOR_nothing
  CODE_FOR_fma_fnmadd_v4sf_maskz_1 = 1720,
#define CODE_FOR_fma_fnmadd_v4sf_maskz_1_round CODE_FOR_nothing
  CODE_FOR_fma_fnmadd_v8df_maskz_1 = 1724,
  CODE_FOR_fma_fnmadd_v8df_maskz_1_round = 1725,
  CODE_FOR_fma_fnmadd_v4df_maskz_1 = 1727,
#define CODE_FOR_fma_fnmadd_v4df_maskz_1_round CODE_FOR_nothing
  CODE_FOR_fma_fnmadd_v2df_maskz_1 = 1729,
#define CODE_FOR_fma_fnmadd_v2df_maskz_1_round CODE_FOR_nothing
  CODE_FOR_avx512f_fnmadd_v16sf_mask = 1730,
  CODE_FOR_avx512f_fnmadd_v16sf_mask_round = 1731,
  CODE_FOR_avx512vl_fnmadd_v8sf_mask = 1732,
#define CODE_FOR_avx512vl_fnmadd_v8sf_mask_round CODE_FOR_nothing
  CODE_FOR_avx512vl_fnmadd_v4sf_mask = 1733,
#define CODE_FOR_avx512vl_fnmadd_v4sf_mask_round CODE_FOR_nothing
  CODE_FOR_avx512f_fnmadd_v8df_mask = 1734,
  CODE_FOR_avx512f_fnmadd_v8df_mask_round = 1735,
  CODE_FOR_avx512vl_fnmadd_v4df_mask = 1736,
#define CODE_FOR_avx512vl_fnmadd_v4df_mask_round CODE_FOR_nothing
  CODE_FOR_avx512vl_fnmadd_v2df_mask = 1737,
#define CODE_FOR_avx512vl_fnmadd_v2df_mask_round CODE_FOR_nothing
  CODE_FOR_avx512f_fnmadd_v16sf_mask3 = 1738,
  CODE_FOR_avx512f_fnmadd_v16sf_mask3_round = 1739,
  CODE_FOR_avx512vl_fnmadd_v8sf_mask3 = 1740,
#define CODE_FOR_avx512vl_fnmadd_v8sf_mask3_round CODE_FOR_nothing
  CODE_FOR_avx512vl_fnmadd_v4sf_mask3 = 1741,
#define CODE_FOR_avx512vl_fnmadd_v4sf_mask3_round CODE_FOR_nothing
  CODE_FOR_avx512f_fnmadd_v8df_mask3 = 1742,
  CODE_FOR_avx512f_fnmadd_v8df_mask3_round = 1743,
  CODE_FOR_avx512vl_fnmadd_v4df_mask3 = 1744,
#define CODE_FOR_avx512vl_fnmadd_v4df_mask3_round CODE_FOR_nothing
  CODE_FOR_avx512vl_fnmadd_v2df_mask3 = 1745,
#define CODE_FOR_avx512vl_fnmadd_v2df_mask3_round CODE_FOR_nothing
  CODE_FOR_fma_fnmsub_v16sf_maskz_1 = 1769,
  CODE_FOR_fma_fnmsub_v16sf_maskz_1_round = 1770,
  CODE_FOR_fma_fnmsub_v8sf_maskz_1 = 1772,
#define CODE_FOR_fma_fnmsub_v8sf_maskz_1_round CODE_FOR_nothing
  CODE_FOR_fma_fnmsub_v4sf_maskz_1 = 1774,
#define CODE_FOR_fma_fnmsub_v4sf_maskz_1_round CODE_FOR_nothing
  CODE_FOR_fma_fnmsub_v8df_maskz_1 = 1778,
  CODE_FOR_fma_fnmsub_v8df_maskz_1_round = 1779,
  CODE_FOR_fma_fnmsub_v4df_maskz_1 = 1781,
#define CODE_FOR_fma_fnmsub_v4df_maskz_1_round CODE_FOR_nothing
  CODE_FOR_fma_fnmsub_v2df_maskz_1 = 1783,
#define CODE_FOR_fma_fnmsub_v2df_maskz_1_round CODE_FOR_nothing
  CODE_FOR_avx512f_fnmsub_v16sf_mask = 1784,
  CODE_FOR_avx512f_fnmsub_v16sf_mask_round = 1785,
  CODE_FOR_avx512vl_fnmsub_v8sf_mask = 1786,
#define CODE_FOR_avx512vl_fnmsub_v8sf_mask_round CODE_FOR_nothing
  CODE_FOR_avx512vl_fnmsub_v4sf_mask = 1787,
#define CODE_FOR_avx512vl_fnmsub_v4sf_mask_round CODE_FOR_nothing
  CODE_FOR_avx512f_fnmsub_v8df_mask = 1788,
  CODE_FOR_avx512f_fnmsub_v8df_mask_round = 1789,
  CODE_FOR_avx512vl_fnmsub_v4df_mask = 1790,
#define CODE_FOR_avx512vl_fnmsub_v4df_mask_round CODE_FOR_nothing
  CODE_FOR_avx512vl_fnmsub_v2df_mask = 1791,
#define CODE_FOR_avx512vl_fnmsub_v2df_mask_round CODE_FOR_nothing
  CODE_FOR_avx512f_fnmsub_v16sf_mask3 = 1792,
  CODE_FOR_avx512f_fnmsub_v16sf_mask3_round = 1793,
  CODE_FOR_avx512vl_fnmsub_v8sf_mask3 = 1794,
  CODE_FOR_avx512vl_fnmsub_v8sf_mask3_round = 1795,
  CODE_FOR_avx512vl_fnmsub_v4sf_mask3 = 1796,
  CODE_FOR_avx512vl_fnmsub_v4sf_mask3_round = 1797,
  CODE_FOR_avx512f_fnmsub_v8df_mask3 = 1798,
  CODE_FOR_avx512f_fnmsub_v8df_mask3_round = 1799,
  CODE_FOR_avx512vl_fnmsub_v4df_mask3 = 1800,
  CODE_FOR_avx512vl_fnmsub_v4df_mask3_round = 1801,
  CODE_FOR_avx512vl_fnmsub_v2df_mask3 = 1802,
  CODE_FOR_avx512vl_fnmsub_v2df_mask3_round = 1803,
  CODE_FOR_fma_fmaddsub_v16sf_maskz_1 = 1811,
  CODE_FOR_fma_fmaddsub_v16sf_maskz_1_round = 1812,
  CODE_FOR_fma_fmaddsub_v8sf_maskz_1 = 1814,
#define CODE_FOR_fma_fmaddsub_v8sf_maskz_1_round CODE_FOR_nothing
  CODE_FOR_fma_fmaddsub_v4sf_maskz_1 = 1816,
#define CODE_FOR_fma_fmaddsub_v4sf_maskz_1_round CODE_FOR_nothing
  CODE_FOR_fma_fmaddsub_v8df_maskz_1 = 1820,
  CODE_FOR_fma_fmaddsub_v8df_maskz_1_round = 1821,
  CODE_FOR_fma_fmaddsub_v4df_maskz_1 = 1823,
#define CODE_FOR_fma_fmaddsub_v4df_maskz_1_round CODE_FOR_nothing
  CODE_FOR_fma_fmaddsub_v2df_maskz_1 = 1825,
#define CODE_FOR_fma_fmaddsub_v2df_maskz_1_round CODE_FOR_nothing
  CODE_FOR_avx512f_fmaddsub_v16sf_mask = 1826,
  CODE_FOR_avx512f_fmaddsub_v16sf_mask_round = 1827,
  CODE_FOR_avx512vl_fmaddsub_v8sf_mask = 1828,
  CODE_FOR_avx512vl_fmaddsub_v8sf_mask_round = 1829,
  CODE_FOR_avx512vl_fmaddsub_v4sf_mask = 1830,
  CODE_FOR_avx512vl_fmaddsub_v4sf_mask_round = 1831,
  CODE_FOR_avx512f_fmaddsub_v8df_mask = 1832,
  CODE_FOR_avx512f_fmaddsub_v8df_mask_round = 1833,
  CODE_FOR_avx512vl_fmaddsub_v4df_mask = 1834,
  CODE_FOR_avx512vl_fmaddsub_v4df_mask_round = 1835,
  CODE_FOR_avx512vl_fmaddsub_v2df_mask = 1836,
  CODE_FOR_avx512vl_fmaddsub_v2df_mask_round = 1837,
  CODE_FOR_avx512f_fmaddsub_v16sf_mask3 = 1838,
  CODE_FOR_avx512f_fmaddsub_v16sf_mask3_round = 1839,
  CODE_FOR_avx512vl_fmaddsub_v8sf_mask3 = 1840,
  CODE_FOR_avx512vl_fmaddsub_v8sf_mask3_round = 1841,
  CODE_FOR_avx512vl_fmaddsub_v4sf_mask3 = 1842,
  CODE_FOR_avx512vl_fmaddsub_v4sf_mask3_round = 1843,
  CODE_FOR_avx512f_fmaddsub_v8df_mask3 = 1844,
  CODE_FOR_avx512f_fmaddsub_v8df_mask3_round = 1845,
  CODE_FOR_avx512vl_fmaddsub_v4df_mask3 = 1846,
  CODE_FOR_avx512vl_fmaddsub_v4df_mask3_round = 1847,
  CODE_FOR_avx512vl_fmaddsub_v2df_mask3 = 1848,
  CODE_FOR_avx512vl_fmaddsub_v2df_mask3_round = 1849,
  CODE_FOR_fma_fmsubadd_v16sf_maskz_1 = 1857,
  CODE_FOR_fma_fmsubadd_v16sf_maskz_1_round = 1858,
  CODE_FOR_fma_fmsubadd_v8sf_maskz_1 = 1860,
#define CODE_FOR_fma_fmsubadd_v8sf_maskz_1_round CODE_FOR_nothing
  CODE_FOR_fma_fmsubadd_v4sf_maskz_1 = 1862,
#define CODE_FOR_fma_fmsubadd_v4sf_maskz_1_round CODE_FOR_nothing
  CODE_FOR_fma_fmsubadd_v8df_maskz_1 = 1866,
  CODE_FOR_fma_fmsubadd_v8df_maskz_1_round = 1867,
  CODE_FOR_fma_fmsubadd_v4df_maskz_1 = 1869,
#define CODE_FOR_fma_fmsubadd_v4df_maskz_1_round CODE_FOR_nothing
  CODE_FOR_fma_fmsubadd_v2df_maskz_1 = 1871,
#define CODE_FOR_fma_fmsubadd_v2df_maskz_1_round CODE_FOR_nothing
  CODE_FOR_avx512f_fmsubadd_v16sf_mask = 1872,
  CODE_FOR_avx512f_fmsubadd_v16sf_mask_round = 1873,
  CODE_FOR_avx512vl_fmsubadd_v8sf_mask = 1874,
  CODE_FOR_avx512vl_fmsubadd_v8sf_mask_round = 1875,
  CODE_FOR_avx512vl_fmsubadd_v4sf_mask = 1876,
  CODE_FOR_avx512vl_fmsubadd_v4sf_mask_round = 1877,
  CODE_FOR_avx512f_fmsubadd_v8df_mask = 1878,
  CODE_FOR_avx512f_fmsubadd_v8df_mask_round = 1879,
  CODE_FOR_avx512vl_fmsubadd_v4df_mask = 1880,
  CODE_FOR_avx512vl_fmsubadd_v4df_mask_round = 1881,
  CODE_FOR_avx512vl_fmsubadd_v2df_mask = 1882,
  CODE_FOR_avx512vl_fmsubadd_v2df_mask_round = 1883,
  CODE_FOR_avx512f_fmsubadd_v16sf_mask3 = 1884,
  CODE_FOR_avx512f_fmsubadd_v16sf_mask3_round = 1885,
  CODE_FOR_avx512vl_fmsubadd_v8sf_mask3 = 1886,
  CODE_FOR_avx512vl_fmsubadd_v8sf_mask3_round = 1887,
  CODE_FOR_avx512vl_fmsubadd_v4sf_mask3 = 1888,
  CODE_FOR_avx512vl_fmsubadd_v4sf_mask3_round = 1889,
  CODE_FOR_avx512f_fmsubadd_v8df_mask3 = 1890,
  CODE_FOR_avx512f_fmsubadd_v8df_mask3_round = 1891,
  CODE_FOR_avx512vl_fmsubadd_v4df_mask3 = 1892,
  CODE_FOR_avx512vl_fmsubadd_v4df_mask3_round = 1893,
  CODE_FOR_avx512vl_fmsubadd_v2df_mask3 = 1894,
  CODE_FOR_avx512vl_fmsubadd_v2df_mask3_round = 1895,
  CODE_FOR_sse_cvtpi2ps = 1920,
  CODE_FOR_sse_cvtps2pi = 1921,
  CODE_FOR_sse_cvttps2pi = 1922,
  CODE_FOR_sse_cvtsi2ss = 1923,
  CODE_FOR_sse_cvtsi2ss_round = 1924,
#define CODE_FOR_sse_cvtsi2ssq CODE_FOR_nothing
#define CODE_FOR_sse_cvtsi2ssq_round CODE_FOR_nothing
  CODE_FOR_sse_cvtss2si = 1925,
  CODE_FOR_sse_cvtss2si_round = 1926,
  CODE_FOR_sse_cvtss2si_2 = 1927,
#define CODE_FOR_sse_cvtss2siq CODE_FOR_nothing
#define CODE_FOR_sse_cvtss2siq_round CODE_FOR_nothing
#define CODE_FOR_sse_cvtss2siq_2 CODE_FOR_nothing
  CODE_FOR_sse_cvttss2si = 1928,
  CODE_FOR_sse_cvttss2si_round = 1929,
#define CODE_FOR_sse_cvttss2siq CODE_FOR_nothing
#define CODE_FOR_sse_cvttss2siq_round CODE_FOR_nothing
  CODE_FOR_cvtusi2ss32 = 1930,
  CODE_FOR_cvtusi2ss32_round = 1931,
  CODE_FOR_cvtusi2sd32 = 1932,
#define CODE_FOR_cvtusi2sd32_round CODE_FOR_nothing
#define CODE_FOR_cvtusi2ss64 CODE_FOR_nothing
#define CODE_FOR_cvtusi2ss64_round CODE_FOR_nothing
#define CODE_FOR_cvtusi2sd64 CODE_FOR_nothing
#define CODE_FOR_cvtusi2sd64_round CODE_FOR_nothing
  CODE_FOR_floatv16siv16sf2 = 1933,
  CODE_FOR_floatv16siv16sf2_round = 1934,
  CODE_FOR_floatv16siv16sf2_mask = 1935,
  CODE_FOR_floatv16siv16sf2_mask_round = 1936,
  CODE_FOR_floatv8siv8sf2 = 1937,
#define CODE_FOR_floatv8siv8sf2_round CODE_FOR_nothing
  CODE_FOR_floatv8siv8sf2_mask = 1938,
#define CODE_FOR_floatv8siv8sf2_mask_round CODE_FOR_nothing
  CODE_FOR_floatv4siv4sf2 = 1939,
#define CODE_FOR_floatv4siv4sf2_round CODE_FOR_nothing
  CODE_FOR_floatv4siv4sf2_mask = 1940,
#define CODE_FOR_floatv4siv4sf2_mask_round CODE_FOR_nothing
  CODE_FOR_ufloatv16siv16sf2 = 1941,
  CODE_FOR_ufloatv16siv16sf2_round = 1942,
  CODE_FOR_ufloatv16siv16sf2_mask = 1943,
  CODE_FOR_ufloatv16siv16sf2_mask_round = 1944,
  CODE_FOR_ufloatv8siv8sf2 = 1945,
  CODE_FOR_ufloatv8siv8sf2_round = 1946,
  CODE_FOR_ufloatv8siv8sf2_mask = 1947,
  CODE_FOR_ufloatv8siv8sf2_mask_round = 1948,
  CODE_FOR_ufloatv4siv4sf2 = 1949,
  CODE_FOR_ufloatv4siv4sf2_round = 1950,
  CODE_FOR_ufloatv4siv4sf2_mask = 1951,
  CODE_FOR_ufloatv4siv4sf2_mask_round = 1952,
  CODE_FOR_avx_fix_notruncv8sfv8si = 1953,
  CODE_FOR_avx_fix_notruncv8sfv8si_mask = 1954,
  CODE_FOR_sse2_fix_notruncv4sfv4si = 1955,
  CODE_FOR_sse2_fix_notruncv4sfv4si_mask = 1956,
  CODE_FOR_avx512f_fix_notruncv16sfv16si_mask = 1959,
  CODE_FOR_avx512f_fix_notruncv16sfv16si_mask_round = 1960,
  CODE_FOR_avx512f_ufix_notruncv16sfv16si_mask = 1963,
  CODE_FOR_avx512f_ufix_notruncv16sfv16si_mask_round = 1964,
  CODE_FOR_avx512vl_ufix_notruncv8sfv8si_mask = 1967,
  CODE_FOR_avx512vl_ufix_notruncv8sfv8si_mask_round = 1968,
  CODE_FOR_avx512vl_ufix_notruncv4sfv4si_mask = 1971,
  CODE_FOR_avx512vl_ufix_notruncv4sfv4si_mask_round = 1972,
  CODE_FOR_avx512dq_cvtps2qqv8di_mask = 1975,
  CODE_FOR_avx512dq_cvtps2qqv8di_mask_round = 1976,
  CODE_FOR_avx512dq_cvtps2qqv4di_mask = 1978,
#define CODE_FOR_avx512dq_cvtps2qqv4di_mask_round CODE_FOR_nothing
  CODE_FOR_avx512dq_cvtps2qqv2di_mask = 1980,
  CODE_FOR_avx512dq_cvtps2uqqv8di_mask = 1983,
  CODE_FOR_avx512dq_cvtps2uqqv8di_mask_round = 1984,
  CODE_FOR_avx512dq_cvtps2uqqv4di_mask = 1986,
#define CODE_FOR_avx512dq_cvtps2uqqv4di_mask_round CODE_FOR_nothing
  CODE_FOR_avx512dq_cvtps2uqqv2di_mask = 1988,
  CODE_FOR_fix_truncv16sfv16si2 = 1989,
  CODE_FOR_fix_truncv16sfv16si2_round = 1990,
  CODE_FOR_fix_truncv16sfv16si2_mask = 1991,
  CODE_FOR_fix_truncv16sfv16si2_mask_round = 1992,
  CODE_FOR_ufix_truncv16sfv16si2 = 1993,
  CODE_FOR_ufix_truncv16sfv16si2_round = 1994,
  CODE_FOR_ufix_truncv16sfv16si2_mask = 1995,
  CODE_FOR_ufix_truncv16sfv16si2_mask_round = 1996,
  CODE_FOR_fix_truncv8sfv8si2 = 1997,
  CODE_FOR_fix_truncv8sfv8si2_mask = 1998,
  CODE_FOR_fix_truncv4sfv4si2 = 1999,
  CODE_FOR_fix_truncv4sfv4si2_mask = 2000,
  CODE_FOR_sse2_cvtpi2pd = 2001,
  CODE_FOR_sse2_cvtpd2pi = 2002,
  CODE_FOR_sse2_cvttpd2pi = 2003,
  CODE_FOR_sse2_cvtsi2sd = 2004,
#define CODE_FOR_sse2_cvtsi2sdq CODE_FOR_nothing
#define CODE_FOR_sse2_cvtsi2sdq_round CODE_FOR_nothing
  CODE_FOR_avx512f_vcvtss2usi = 2005,
  CODE_FOR_avx512f_vcvtss2usi_round = 2006,
#define CODE_FOR_avx512f_vcvtss2usiq CODE_FOR_nothing
#define CODE_FOR_avx512f_vcvtss2usiq_round CODE_FOR_nothing
  CODE_FOR_avx512f_vcvttss2usi = 2007,
  CODE_FOR_avx512f_vcvttss2usi_round = 2008,
#define CODE_FOR_avx512f_vcvttss2usiq CODE_FOR_nothing
#define CODE_FOR_avx512f_vcvttss2usiq_round CODE_FOR_nothing
  CODE_FOR_avx512f_vcvtsd2usi = 2009,
  CODE_FOR_avx512f_vcvtsd2usi_round = 2010,
#define CODE_FOR_avx512f_vcvtsd2usiq CODE_FOR_nothing
#define CODE_FOR_avx512f_vcvtsd2usiq_round CODE_FOR_nothing
  CODE_FOR_avx512f_vcvttsd2usi = 2011,
  CODE_FOR_avx512f_vcvttsd2usi_round = 2012,
#define CODE_FOR_avx512f_vcvttsd2usiq CODE_FOR_nothing
#define CODE_FOR_avx512f_vcvttsd2usiq_round CODE_FOR_nothing
  CODE_FOR_sse2_cvtsd2si = 2013,
  CODE_FOR_sse2_cvtsd2si_round = 2014,
  CODE_FOR_sse2_cvtsd2si_2 = 2015,
#define CODE_FOR_sse2_cvtsd2siq CODE_FOR_nothing
#define CODE_FOR_sse2_cvtsd2siq_round CODE_FOR_nothing
#define CODE_FOR_sse2_cvtsd2siq_2 CODE_FOR_nothing
  CODE_FOR_sse2_cvttsd2si = 2016,
  CODE_FOR_sse2_cvttsd2si_round = 2017,
#define CODE_FOR_sse2_cvttsd2siq CODE_FOR_nothing
#define CODE_FOR_sse2_cvttsd2siq_round CODE_FOR_nothing
  CODE_FOR_floatv8siv8df2 = 2018,
  CODE_FOR_floatv8siv8df2_mask = 2019,
  CODE_FOR_floatv4siv4df2 = 2020,
  CODE_FOR_floatv4siv4df2_mask = 2021,
  CODE_FOR_floatv8div8df2 = 2022,
  CODE_FOR_floatv8div8df2_round = 2023,
  CODE_FOR_floatv8div8df2_mask = 2024,
  CODE_FOR_floatv8div8df2_mask_round = 2025,
  CODE_FOR_ufloatv8div8df2 = 2026,
  CODE_FOR_ufloatv8div8df2_round = 2027,
  CODE_FOR_ufloatv8div8df2_mask = 2028,
  CODE_FOR_ufloatv8div8df2_mask_round = 2029,
  CODE_FOR_floatv4div4df2 = 2030,
  CODE_FOR_floatv4div4df2_round = 2031,
  CODE_FOR_floatv4div4df2_mask = 2032,
  CODE_FOR_floatv4div4df2_mask_round = 2033,
  CODE_FOR_ufloatv4div4df2 = 2034,
  CODE_FOR_ufloatv4div4df2_round = 2035,
  CODE_FOR_ufloatv4div4df2_mask = 2036,
  CODE_FOR_ufloatv4div4df2_mask_round = 2037,
  CODE_FOR_floatv2div2df2 = 2038,
  CODE_FOR_floatv2div2df2_round = 2039,
  CODE_FOR_floatv2div2df2_mask = 2040,
  CODE_FOR_floatv2div2df2_mask_round = 2041,
  CODE_FOR_ufloatv2div2df2 = 2042,
  CODE_FOR_ufloatv2div2df2_round = 2043,
  CODE_FOR_ufloatv2div2df2_mask = 2044,
  CODE_FOR_ufloatv2div2df2_mask_round = 2045,
  CODE_FOR_floatv8div8sf2 = 2046,
  CODE_FOR_floatv8div8sf2_round = 2047,
  CODE_FOR_floatv8div8sf2_mask = 2048,
  CODE_FOR_floatv8div8sf2_mask_round = 2049,
  CODE_FOR_ufloatv8div8sf2 = 2050,
  CODE_FOR_ufloatv8div8sf2_round = 2051,
  CODE_FOR_ufloatv8div8sf2_mask = 2052,
  CODE_FOR_ufloatv8div8sf2_mask_round = 2053,
  CODE_FOR_floatv4div4sf2 = 2054,
#define CODE_FOR_floatv4div4sf2_round CODE_FOR_nothing
  CODE_FOR_floatv4div4sf2_mask = 2055,
#define CODE_FOR_floatv4div4sf2_mask_round CODE_FOR_nothing
  CODE_FOR_ufloatv4div4sf2 = 2056,
#define CODE_FOR_ufloatv4div4sf2_round CODE_FOR_nothing
  CODE_FOR_ufloatv4div4sf2_mask = 2057,
#define CODE_FOR_ufloatv4div4sf2_mask_round CODE_FOR_nothing
  CODE_FOR_floatv2div2sf2_mask = 2060,
  CODE_FOR_ufloatv2div2sf2_mask = 2061,
  CODE_FOR_ufloatv8siv8df2 = 2062,
  CODE_FOR_ufloatv8siv8df2_mask = 2063,
  CODE_FOR_ufloatv4siv4df2 = 2064,
  CODE_FOR_ufloatv4siv4df2_mask = 2065,
  CODE_FOR_ufloatv2siv2df2 = 2066,
  CODE_FOR_ufloatv2siv2df2_mask = 2067,
  CODE_FOR_avx512f_cvtdq2pd512_2 = 2068,
  CODE_FOR_avx_cvtdq2pd256_2 = 2069,
  CODE_FOR_sse2_cvtdq2pd = 2070,
  CODE_FOR_sse2_cvtdq2pd_mask = 2071,
  CODE_FOR_avx512f_cvtpd2dq512_mask = 2074,
  CODE_FOR_avx512f_cvtpd2dq512_mask_round = 2075,
  CODE_FOR_avx_cvtpd2dq256 = 2076,
  CODE_FOR_avx_cvtpd2dq256_mask = 2077,
  CODE_FOR_sse2_cvtpd2dq = 2079,
  CODE_FOR_sse2_cvtpd2dq_mask = 2080,
  CODE_FOR_ufix_notruncv8dfv8si2 = 2081,
  CODE_FOR_ufix_notruncv8dfv8si2_round = 2082,
  CODE_FOR_ufix_notruncv8dfv8si2_mask = 2083,
  CODE_FOR_ufix_notruncv8dfv8si2_mask_round = 2084,
  CODE_FOR_ufix_notruncv4dfv4si2 = 2085,
  CODE_FOR_ufix_notruncv4dfv4si2_round = 2086,
  CODE_FOR_ufix_notruncv4dfv4si2_mask = 2087,
  CODE_FOR_ufix_notruncv4dfv4si2_mask_round = 2088,
  CODE_FOR_ufix_notruncv2dfv2si2 = 2089,
  CODE_FOR_ufix_notruncv2dfv2si2_mask = 2090,
  CODE_FOR_fix_truncv8dfv8si2 = 2091,
  CODE_FOR_fix_truncv8dfv8si2_round = 2092,
  CODE_FOR_fix_truncv8dfv8si2_mask = 2093,
  CODE_FOR_fix_truncv8dfv8si2_mask_round = 2094,
  CODE_FOR_ufix_truncv8dfv8si2 = 2095,
  CODE_FOR_ufix_truncv8dfv8si2_round = 2096,
  CODE_FOR_ufix_truncv8dfv8si2_mask = 2097,
  CODE_FOR_ufix_truncv8dfv8si2_mask_round = 2098,
  CODE_FOR_ufix_truncv2dfv2si2 = 2099,
  CODE_FOR_ufix_truncv2dfv2si2_mask = 2100,
  CODE_FOR_fix_truncv4dfv4si2 = 2101,
  CODE_FOR_fix_truncv4dfv4si2_mask = 2102,
  CODE_FOR_ufix_truncv4dfv4si2 = 2103,
  CODE_FOR_ufix_truncv4dfv4si2_mask = 2104,
  CODE_FOR_fix_truncv8dfv8di2 = 2105,
  CODE_FOR_fix_truncv8dfv8di2_round = 2106,
  CODE_FOR_fix_truncv8dfv8di2_mask = 2107,
  CODE_FOR_fix_truncv8dfv8di2_mask_round = 2108,
  CODE_FOR_ufix_truncv8dfv8di2 = 2109,
  CODE_FOR_ufix_truncv8dfv8di2_round = 2110,
  CODE_FOR_ufix_truncv8dfv8di2_mask = 2111,
  CODE_FOR_ufix_truncv8dfv8di2_mask_round = 2112,
  CODE_FOR_fix_truncv4dfv4di2 = 2113,
#define CODE_FOR_fix_truncv4dfv4di2_round CODE_FOR_nothing
  CODE_FOR_fix_truncv4dfv4di2_mask = 2114,
#define CODE_FOR_fix_truncv4dfv4di2_mask_round CODE_FOR_nothing
  CODE_FOR_ufix_truncv4dfv4di2 = 2115,
#define CODE_FOR_ufix_truncv4dfv4di2_round CODE_FOR_nothing
  CODE_FOR_ufix_truncv4dfv4di2_mask = 2116,
#define CODE_FOR_ufix_truncv4dfv4di2_mask_round CODE_FOR_nothing
  CODE_FOR_fix_truncv2dfv2di2 = 2117,
#define CODE_FOR_fix_truncv2dfv2di2_round CODE_FOR_nothing
  CODE_FOR_fix_truncv2dfv2di2_mask = 2118,
#define CODE_FOR_fix_truncv2dfv2di2_mask_round CODE_FOR_nothing
  CODE_FOR_ufix_truncv2dfv2di2 = 2119,
#define CODE_FOR_ufix_truncv2dfv2di2_round CODE_FOR_nothing
  CODE_FOR_ufix_truncv2dfv2di2_mask = 2120,
#define CODE_FOR_ufix_truncv2dfv2di2_mask_round CODE_FOR_nothing
  CODE_FOR_fix_notruncv8dfv8di2 = 2121,
  CODE_FOR_fix_notruncv8dfv8di2_round = 2122,
  CODE_FOR_fix_notruncv8dfv8di2_mask = 2123,
  CODE_FOR_fix_notruncv8dfv8di2_mask_round = 2124,
  CODE_FOR_fix_notruncv4dfv4di2 = 2125,
#define CODE_FOR_fix_notruncv4dfv4di2_round CODE_FOR_nothing
  CODE_FOR_fix_notruncv4dfv4di2_mask = 2126,
#define CODE_FOR_fix_notruncv4dfv4di2_mask_round CODE_FOR_nothing
  CODE_FOR_fix_notruncv2dfv2di2 = 2127,
#define CODE_FOR_fix_notruncv2dfv2di2_round CODE_FOR_nothing
  CODE_FOR_fix_notruncv2dfv2di2_mask = 2128,
#define CODE_FOR_fix_notruncv2dfv2di2_mask_round CODE_FOR_nothing
  CODE_FOR_ufix_notruncv8dfv8di2 = 2129,
  CODE_FOR_ufix_notruncv8dfv8di2_round = 2130,
  CODE_FOR_ufix_notruncv8dfv8di2_mask = 2131,
  CODE_FOR_ufix_notruncv8dfv8di2_mask_round = 2132,
  CODE_FOR_ufix_notruncv4dfv4di2 = 2133,
#define CODE_FOR_ufix_notruncv4dfv4di2_round CODE_FOR_nothing
  CODE_FOR_ufix_notruncv4dfv4di2_mask = 2134,
#define CODE_FOR_ufix_notruncv4dfv4di2_mask_round CODE_FOR_nothing
  CODE_FOR_ufix_notruncv2dfv2di2 = 2135,
#define CODE_FOR_ufix_notruncv2dfv2di2_round CODE_FOR_nothing
  CODE_FOR_ufix_notruncv2dfv2di2_mask = 2136,
#define CODE_FOR_ufix_notruncv2dfv2di2_mask_round CODE_FOR_nothing
  CODE_FOR_fix_truncv8sfv8di2 = 2137,
  CODE_FOR_fix_truncv8sfv8di2_round = 2138,
  CODE_FOR_fix_truncv8sfv8di2_mask = 2139,
  CODE_FOR_fix_truncv8sfv8di2_mask_round = 2140,
  CODE_FOR_ufix_truncv8sfv8di2 = 2141,
  CODE_FOR_ufix_truncv8sfv8di2_round = 2142,
  CODE_FOR_ufix_truncv8sfv8di2_mask = 2143,
  CODE_FOR_ufix_truncv8sfv8di2_mask_round = 2144,
  CODE_FOR_fix_truncv4sfv4di2 = 2145,
#define CODE_FOR_fix_truncv4sfv4di2_round CODE_FOR_nothing
  CODE_FOR_fix_truncv4sfv4di2_mask = 2146,
#define CODE_FOR_fix_truncv4sfv4di2_mask_round CODE_FOR_nothing
  CODE_FOR_ufix_truncv4sfv4di2 = 2147,
#define CODE_FOR_ufix_truncv4sfv4di2_round CODE_FOR_nothing
  CODE_FOR_ufix_truncv4sfv4di2_mask = 2148,
#define CODE_FOR_ufix_truncv4sfv4di2_mask_round CODE_FOR_nothing
  CODE_FOR_fix_truncv2sfv2di2 = 2149,
  CODE_FOR_fix_truncv2sfv2di2_mask = 2150,
  CODE_FOR_ufix_truncv2sfv2di2 = 2151,
  CODE_FOR_ufix_truncv2sfv2di2_mask = 2152,
  CODE_FOR_ufix_truncv8sfv8si2 = 2153,
  CODE_FOR_ufix_truncv8sfv8si2_mask = 2154,
  CODE_FOR_ufix_truncv4sfv4si2 = 2155,
  CODE_FOR_ufix_truncv4sfv4si2_mask = 2156,
  CODE_FOR_sse2_cvttpd2dq = 2157,
  CODE_FOR_sse2_cvttpd2dq_mask = 2158,
  CODE_FOR_sse2_cvtsd2ss = 2159,
  CODE_FOR_sse2_cvtsd2ss_round = 2160,
  CODE_FOR_sse2_cvtss2sd = 2161,
  CODE_FOR_sse2_cvtss2sd_round = 2162,
  CODE_FOR_avx512f_cvtpd2ps512_mask = 2165,
  CODE_FOR_avx512f_cvtpd2ps512_mask_round = 2166,
  CODE_FOR_avx_cvtpd2ps256 = 2167,
  CODE_FOR_avx_cvtpd2ps256_mask = 2168,
  CODE_FOR_avx512f_cvtps2pd512 = 2171,
  CODE_FOR_avx512f_cvtps2pd512_round = 2172,
  CODE_FOR_avx512f_cvtps2pd512_mask = 2173,
  CODE_FOR_avx512f_cvtps2pd512_mask_round = 2174,
  CODE_FOR_avx_cvtps2pd256 = 2175,
#define CODE_FOR_avx_cvtps2pd256_round CODE_FOR_nothing
  CODE_FOR_avx_cvtps2pd256_mask = 2176,
#define CODE_FOR_avx_cvtps2pd256_mask_round CODE_FOR_nothing
  CODE_FOR_vec_unpacks_lo_v16sf = 2178,
  CODE_FOR_avx512bw_cvtb2maskv64qi = 2179,
  CODE_FOR_avx512vl_cvtb2maskv16qi = 2180,
  CODE_FOR_avx512vl_cvtb2maskv32qi = 2181,
  CODE_FOR_avx512bw_cvtw2maskv32hi = 2182,
  CODE_FOR_avx512vl_cvtw2maskv16hi = 2183,
  CODE_FOR_avx512vl_cvtw2maskv8hi = 2184,
  CODE_FOR_avx512f_cvtd2maskv16si = 2185,
  CODE_FOR_avx512vl_cvtd2maskv8si = 2186,
  CODE_FOR_avx512vl_cvtd2maskv4si = 2187,
  CODE_FOR_avx512f_cvtq2maskv8di = 2188,
  CODE_FOR_avx512vl_cvtq2maskv4di = 2189,
  CODE_FOR_avx512vl_cvtq2maskv2di = 2190,
  CODE_FOR_sse2_cvtps2pd = 2203,
  CODE_FOR_sse2_cvtps2pd_mask = 2204,
  CODE_FOR_sse_movhlps = 2205,
  CODE_FOR_sse_movlhps = 2206,
  CODE_FOR_avx512f_unpckhps512_mask = 2208,
  CODE_FOR_avx_unpckhps256 = 2209,
  CODE_FOR_avx_unpckhps256_mask = 2210,
  CODE_FOR_vec_interleave_highv4sf = 2211,
  CODE_FOR_vec_interleave_highv4sf_mask = 2212,
  CODE_FOR_avx512f_unpcklps512_mask = 2214,
  CODE_FOR_avx_unpcklps256 = 2215,
  CODE_FOR_avx_unpcklps256_mask = 2216,
  CODE_FOR_unpcklps128_mask = 2217,
  CODE_FOR_vec_interleave_lowv4sf = 2218,
  CODE_FOR_avx_movshdup256 = 2219,
  CODE_FOR_avx_movshdup256_mask = 2220,
  CODE_FOR_sse3_movshdup = 2221,
  CODE_FOR_sse3_movshdup_mask = 2222,
  CODE_FOR_avx512f_movshdup512_mask = 2224,
  CODE_FOR_avx_movsldup256 = 2225,
  CODE_FOR_avx_movsldup256_mask = 2226,
  CODE_FOR_sse3_movsldup = 2227,
  CODE_FOR_sse3_movsldup_mask = 2228,
  CODE_FOR_avx512f_movsldup512_mask = 2230,
  CODE_FOR_avx_shufps256_1 = 2231,
  CODE_FOR_avx_shufps256_1_mask = 2232,
  CODE_FOR_sse_shufps_v4sf_mask = 2233,
  CODE_FOR_sse_shufps_v4si = 2234,
  CODE_FOR_sse_shufps_v4sf = 2235,
  CODE_FOR_sse_storehps = 2236,
  CODE_FOR_sse_loadhps = 2237,
  CODE_FOR_sse_storelps = 2238,
  CODE_FOR_sse_loadlps = 2239,
  CODE_FOR_sse_movss = 2240,
  CODE_FOR_avx2_vec_dupv8sf = 2241,
  CODE_FOR_avx2_vec_dupv4sf = 2242,
  CODE_FOR_avx2_vec_dupv8sf_1 = 2243,
  CODE_FOR_avx512f_vec_dupv16sf_1 = 2244,
  CODE_FOR_avx512f_vec_dupv8df_1 = 2245,
  CODE_FOR_vec_setv4si_0 = 2249,
  CODE_FOR_vec_setv4sf_0 = 2250,
  CODE_FOR_sse4_1_insertps = 2252,
  CODE_FOR_avx512dq_vextractf64x2_1_maskm = 2256,
  CODE_FOR_avx512dq_vextracti64x2_1_maskm = 2257,
  CODE_FOR_avx512f_vextractf32x4_1_maskm = 2258,
  CODE_FOR_avx512f_vextracti32x4_1_maskm = 2259,
  CODE_FOR_avx512dq_vextractf64x2_1_mask = 2261,
  CODE_FOR_avx512dq_vextracti64x2_1_mask = 2263,
  CODE_FOR_avx512f_vextractf32x4_1_mask = 2265,
  CODE_FOR_avx512f_vextracti32x4_1_mask = 2267,
  CODE_FOR_vec_extract_lo_v8df_maskm = 2268,
  CODE_FOR_vec_extract_lo_v8di_maskm = 2269,
  CODE_FOR_vec_extract_lo_v8df = 2270,
  CODE_FOR_vec_extract_lo_v8df_mask = 2271,
  CODE_FOR_vec_extract_lo_v8di = 2272,
  CODE_FOR_vec_extract_lo_v8di_mask = 2273,
  CODE_FOR_vec_extract_hi_v8df_maskm = 2274,
  CODE_FOR_vec_extract_hi_v8di_maskm = 2275,
  CODE_FOR_vec_extract_hi_v8df = 2276,
  CODE_FOR_vec_extract_hi_v8df_mask = 2277,
  CODE_FOR_vec_extract_hi_v8di = 2278,
  CODE_FOR_vec_extract_hi_v8di_mask = 2279,
  CODE_FOR_vec_extract_hi_v16sf_maskm = 2280,
  CODE_FOR_vec_extract_hi_v16si_maskm = 2281,
  CODE_FOR_vec_extract_hi_v16sf = 2282,
  CODE_FOR_vec_extract_hi_v16sf_mask = 2283,
  CODE_FOR_vec_extract_hi_v16si = 2284,
  CODE_FOR_vec_extract_hi_v16si_mask = 2285,
  CODE_FOR_vec_extract_lo_v16sf = 2286,
  CODE_FOR_vec_extract_lo_v16sf_mask = 2287,
  CODE_FOR_vec_extract_lo_v16si = 2288,
  CODE_FOR_vec_extract_lo_v16si_mask = 2289,
  CODE_FOR_vec_extract_lo_v4di = 2290,
  CODE_FOR_vec_extract_lo_v4di_mask = 2291,
  CODE_FOR_vec_extract_lo_v4df = 2292,
  CODE_FOR_vec_extract_lo_v4df_mask = 2293,
  CODE_FOR_vec_extract_hi_v4di_maskm = 2294,
  CODE_FOR_vec_extract_hi_v4df_maskm = 2295,
  CODE_FOR_vec_extract_hi_v4di_mask = 2296,
  CODE_FOR_vec_extract_hi_v4df_mask = 2297,
  CODE_FOR_vec_extract_hi_v4di = 2298,
  CODE_FOR_vec_extract_hi_v4df = 2299,
  CODE_FOR_vec_extract_lo_v8si = 2300,
  CODE_FOR_vec_extract_lo_v8si_mask = 2301,
  CODE_FOR_vec_extract_lo_v8sf = 2302,
  CODE_FOR_vec_extract_lo_v8sf_mask = 2303,
  CODE_FOR_vec_extract_lo_v8si_maskm = 2304,
  CODE_FOR_vec_extract_lo_v8sf_maskm = 2305,
  CODE_FOR_vec_extract_hi_v8si_maskm = 2306,
  CODE_FOR_vec_extract_hi_v8sf_maskm = 2307,
  CODE_FOR_vec_extract_hi_v8si = 2308,
  CODE_FOR_vec_extract_hi_v8si_mask = 2309,
  CODE_FOR_vec_extract_hi_v8sf = 2310,
  CODE_FOR_vec_extract_hi_v8sf_mask = 2311,
  CODE_FOR_vec_extract_lo_v32hi = 2312,
  CODE_FOR_vec_extract_hi_v32hi = 2313,
  CODE_FOR_vec_extract_lo_v16hi = 2314,
  CODE_FOR_vec_extract_hi_v16hi = 2315,
  CODE_FOR_vec_extract_lo_v64qi = 2316,
  CODE_FOR_vec_extract_hi_v64qi = 2317,
  CODE_FOR_vec_extract_lo_v32qi = 2318,
  CODE_FOR_vec_extract_hi_v32qi = 2319,
  CODE_FOR_avx512f_unpckhpd512_mask = 2321,
  CODE_FOR_avx_unpckhpd256 = 2322,
  CODE_FOR_avx_unpckhpd256_mask = 2323,
  CODE_FOR_avx512vl_unpckhpd128_mask = 2324,
  CODE_FOR_avx512vl_unpcklpd128_mask = 2330,
  CODE_FOR_avx512f_vmscalefv4sf = 2332,
  CODE_FOR_avx512f_vmscalefv4sf_round = 2333,
  CODE_FOR_avx512f_vmscalefv2df = 2334,
  CODE_FOR_avx512f_vmscalefv2df_round = 2335,
  CODE_FOR_avx512f_scalefv16sf = 2336,
  CODE_FOR_avx512f_scalefv16sf_round = 2337,
  CODE_FOR_avx512f_scalefv16sf_mask = 2338,
  CODE_FOR_avx512f_scalefv16sf_mask_round = 2339,
  CODE_FOR_avx512vl_scalefv8sf = 2340,
  CODE_FOR_avx512vl_scalefv8sf_round = 2341,
  CODE_FOR_avx512vl_scalefv8sf_mask = 2342,
  CODE_FOR_avx512vl_scalefv8sf_mask_round = 2343,
  CODE_FOR_avx512vl_scalefv4sf = 2344,
  CODE_FOR_avx512vl_scalefv4sf_round = 2345,
  CODE_FOR_avx512vl_scalefv4sf_mask = 2346,
  CODE_FOR_avx512vl_scalefv4sf_mask_round = 2347,
  CODE_FOR_avx512f_scalefv8df = 2348,
  CODE_FOR_avx512f_scalefv8df_round = 2349,
  CODE_FOR_avx512f_scalefv8df_mask = 2350,
  CODE_FOR_avx512f_scalefv8df_mask_round = 2351,
  CODE_FOR_avx512vl_scalefv4df = 2352,
  CODE_FOR_avx512vl_scalefv4df_round = 2353,
  CODE_FOR_avx512vl_scalefv4df_mask = 2354,
  CODE_FOR_avx512vl_scalefv4df_mask_round = 2355,
  CODE_FOR_avx512vl_scalefv2df = 2356,
  CODE_FOR_avx512vl_scalefv2df_round = 2357,
  CODE_FOR_avx512vl_scalefv2df_mask = 2358,
  CODE_FOR_avx512vl_scalefv2df_mask_round = 2359,
  CODE_FOR_avx512f_vternlogv16si = 2360,
  CODE_FOR_avx512f_vternlogv16si_maskz_1 = 2361,
  CODE_FOR_avx512vl_vternlogv8si = 2362,
  CODE_FOR_avx512vl_vternlogv8si_maskz_1 = 2363,
  CODE_FOR_avx512vl_vternlogv4si = 2364,
  CODE_FOR_avx512vl_vternlogv4si_maskz_1 = 2365,
  CODE_FOR_avx512f_vternlogv8di = 2366,
  CODE_FOR_avx512f_vternlogv8di_maskz_1 = 2367,
  CODE_FOR_avx512vl_vternlogv4di = 2368,
  CODE_FOR_avx512vl_vternlogv4di_maskz_1 = 2369,
  CODE_FOR_avx512vl_vternlogv2di = 2370,
  CODE_FOR_avx512vl_vternlogv2di_maskz_1 = 2371,
  CODE_FOR_avx512f_vternlogv16si_mask = 2372,
  CODE_FOR_avx512vl_vternlogv8si_mask = 2373,
  CODE_FOR_avx512vl_vternlogv4si_mask = 2374,
  CODE_FOR_avx512f_vternlogv8di_mask = 2375,
  CODE_FOR_avx512vl_vternlogv4di_mask = 2376,
  CODE_FOR_avx512vl_vternlogv2di_mask = 2377,
  CODE_FOR_avx512f_getexpv16sf = 2378,
  CODE_FOR_avx512f_getexpv16sf_round = 2379,
  CODE_FOR_avx512f_getexpv16sf_mask = 2380,
  CODE_FOR_avx512f_getexpv16sf_mask_round = 2381,
  CODE_FOR_avx512vl_getexpv8sf = 2382,
  CODE_FOR_avx512vl_getexpv8sf_round = 2383,
  CODE_FOR_avx512vl_getexpv8sf_mask = 2384,
  CODE_FOR_avx512vl_getexpv8sf_mask_round = 2385,
  CODE_FOR_avx512vl_getexpv4sf = 2386,
  CODE_FOR_avx512vl_getexpv4sf_round = 2387,
  CODE_FOR_avx512vl_getexpv4sf_mask = 2388,
  CODE_FOR_avx512vl_getexpv4sf_mask_round = 2389,
  CODE_FOR_avx512f_getexpv8df = 2390,
  CODE_FOR_avx512f_getexpv8df_round = 2391,
  CODE_FOR_avx512f_getexpv8df_mask = 2392,
  CODE_FOR_avx512f_getexpv8df_mask_round = 2393,
  CODE_FOR_avx512vl_getexpv4df = 2394,
  CODE_FOR_avx512vl_getexpv4df_round = 2395,
  CODE_FOR_avx512vl_getexpv4df_mask = 2396,
  CODE_FOR_avx512vl_getexpv4df_mask_round = 2397,
  CODE_FOR_avx512vl_getexpv2df = 2398,
  CODE_FOR_avx512vl_getexpv2df_round = 2399,
  CODE_FOR_avx512vl_getexpv2df_mask = 2400,
  CODE_FOR_avx512vl_getexpv2df_mask_round = 2401,
  CODE_FOR_avx512f_sgetexpv4sf = 2402,
  CODE_FOR_avx512f_sgetexpv4sf_round = 2403,
  CODE_FOR_avx512f_sgetexpv2df = 2404,
  CODE_FOR_avx512f_sgetexpv2df_round = 2405,
  CODE_FOR_avx512f_alignv16si_mask = 2407,
  CODE_FOR_avx512vl_alignv8si_mask = 2409,
  CODE_FOR_avx512vl_alignv4si_mask = 2411,
  CODE_FOR_avx512f_alignv8di_mask = 2413,
  CODE_FOR_avx512vl_alignv4di_mask = 2415,
  CODE_FOR_avx512vl_alignv2di_mask = 2417,
  CODE_FOR_avx512f_fixupimmv16sf = 2418,
  CODE_FOR_avx512f_fixupimmv16sf_round = 2419,
  CODE_FOR_avx512f_fixupimmv16sf_maskz_1 = 2420,
  CODE_FOR_avx512f_fixupimmv16sf_maskz_1_round = 2421,
  CODE_FOR_avx512vl_fixupimmv8sf = 2422,
  CODE_FOR_avx512vl_fixupimmv8sf_round = 2423,
  CODE_FOR_avx512vl_fixupimmv8sf_maskz_1 = 2424,
  CODE_FOR_avx512vl_fixupimmv8sf_maskz_1_round = 2425,
  CODE_FOR_avx512vl_fixupimmv4sf = 2426,
  CODE_FOR_avx512vl_fixupimmv4sf_round = 2427,
  CODE_FOR_avx512vl_fixupimmv4sf_maskz_1 = 2428,
  CODE_FOR_avx512vl_fixupimmv4sf_maskz_1_round = 2429,
  CODE_FOR_avx512f_fixupimmv8df = 2430,
  CODE_FOR_avx512f_fixupimmv8df_round = 2431,
  CODE_FOR_avx512f_fixupimmv8df_maskz_1 = 2432,
  CODE_FOR_avx512f_fixupimmv8df_maskz_1_round = 2433,
  CODE_FOR_avx512vl_fixupimmv4df = 2434,
  CODE_FOR_avx512vl_fixupimmv4df_round = 2435,
  CODE_FOR_avx512vl_fixupimmv4df_maskz_1 = 2436,
  CODE_FOR_avx512vl_fixupimmv4df_maskz_1_round = 2437,
  CODE_FOR_avx512vl_fixupimmv2df = 2438,
  CODE_FOR_avx512vl_fixupimmv2df_round = 2439,
  CODE_FOR_avx512vl_fixupimmv2df_maskz_1 = 2440,
  CODE_FOR_avx512vl_fixupimmv2df_maskz_1_round = 2441,
  CODE_FOR_avx512f_fixupimmv16sf_mask = 2442,
  CODE_FOR_avx512f_fixupimmv16sf_mask_round = 2443,
  CODE_FOR_avx512vl_fixupimmv8sf_mask = 2444,
  CODE_FOR_avx512vl_fixupimmv8sf_mask_round = 2445,
  CODE_FOR_avx512vl_fixupimmv4sf_mask = 2446,
  CODE_FOR_avx512vl_fixupimmv4sf_mask_round = 2447,
  CODE_FOR_avx512f_fixupimmv8df_mask = 2448,
  CODE_FOR_avx512f_fixupimmv8df_mask_round = 2449,
  CODE_FOR_avx512vl_fixupimmv4df_mask = 2450,
  CODE_FOR_avx512vl_fixupimmv4df_mask_round = 2451,
  CODE_FOR_avx512vl_fixupimmv2df_mask = 2452,
  CODE_FOR_avx512vl_fixupimmv2df_mask_round = 2453,
  CODE_FOR_avx512f_sfixupimmv4sf = 2454,
  CODE_FOR_avx512f_sfixupimmv4sf_round = 2455,
  CODE_FOR_avx512f_sfixupimmv4sf_maskz_1 = 2456,
  CODE_FOR_avx512f_sfixupimmv4sf_maskz_1_round = 2457,
  CODE_FOR_avx512f_sfixupimmv2df = 2458,
  CODE_FOR_avx512f_sfixupimmv2df_round = 2459,
  CODE_FOR_avx512f_sfixupimmv2df_maskz_1 = 2460,
  CODE_FOR_avx512f_sfixupimmv2df_maskz_1_round = 2461,
  CODE_FOR_avx512f_sfixupimmv4sf_mask = 2462,
  CODE_FOR_avx512f_sfixupimmv4sf_mask_round = 2463,
  CODE_FOR_avx512f_sfixupimmv2df_mask = 2464,
  CODE_FOR_avx512f_sfixupimmv2df_mask_round = 2465,
  CODE_FOR_avx512f_rndscalev16sf = 2466,
  CODE_FOR_avx512f_rndscalev16sf_round = 2467,
  CODE_FOR_avx512f_rndscalev16sf_mask = 2468,
  CODE_FOR_avx512f_rndscalev16sf_mask_round = 2469,
  CODE_FOR_avx512vl_rndscalev8sf = 2470,
  CODE_FOR_avx512vl_rndscalev8sf_round = 2471,
  CODE_FOR_avx512vl_rndscalev8sf_mask = 2472,
  CODE_FOR_avx512vl_rndscalev8sf_mask_round = 2473,
  CODE_FOR_avx512vl_rndscalev4sf = 2474,
  CODE_FOR_avx512vl_rndscalev4sf_round = 2475,
  CODE_FOR_avx512vl_rndscalev4sf_mask = 2476,
  CODE_FOR_avx512vl_rndscalev4sf_mask_round = 2477,
  CODE_FOR_avx512f_rndscalev8df = 2478,
  CODE_FOR_avx512f_rndscalev8df_round = 2479,
  CODE_FOR_avx512f_rndscalev8df_mask = 2480,
  CODE_FOR_avx512f_rndscalev8df_mask_round = 2481,
  CODE_FOR_avx512vl_rndscalev4df = 2482,
  CODE_FOR_avx512vl_rndscalev4df_round = 2483,
  CODE_FOR_avx512vl_rndscalev4df_mask = 2484,
  CODE_FOR_avx512vl_rndscalev4df_mask_round = 2485,
  CODE_FOR_avx512vl_rndscalev2df = 2486,
  CODE_FOR_avx512vl_rndscalev2df_round = 2487,
  CODE_FOR_avx512vl_rndscalev2df_mask = 2488,
  CODE_FOR_avx512vl_rndscalev2df_mask_round = 2489,
  CODE_FOR_avx512f_rndscalev4sf = 2490,
  CODE_FOR_avx512f_rndscalev4sf_round = 2491,
  CODE_FOR_avx512f_rndscalev2df = 2492,
  CODE_FOR_avx512f_rndscalev2df_round = 2493,
  CODE_FOR_avx512f_shufps512_1 = 2494,
  CODE_FOR_avx512f_shufps512_1_mask = 2495,
  CODE_FOR_avx512f_shufpd512_1 = 2496,
  CODE_FOR_avx512f_shufpd512_1_mask = 2497,
  CODE_FOR_avx_shufpd256_1 = 2498,
  CODE_FOR_avx_shufpd256_1_mask = 2499,
  CODE_FOR_sse2_shufpd_v2df_mask = 2500,
  CODE_FOR_avx2_interleave_highv4di = 2501,
  CODE_FOR_avx2_interleave_highv4di_mask = 2502,
  CODE_FOR_avx512f_interleave_highv8di_mask = 2504,
  CODE_FOR_vec_interleave_highv2di = 2505,
  CODE_FOR_vec_interleave_highv2di_mask = 2506,
  CODE_FOR_avx2_interleave_lowv4di = 2507,
  CODE_FOR_avx2_interleave_lowv4di_mask = 2508,
  CODE_FOR_avx512f_interleave_lowv8di_mask = 2510,
  CODE_FOR_vec_interleave_lowv2di = 2511,
  CODE_FOR_vec_interleave_lowv2di_mask = 2512,
  CODE_FOR_sse2_shufpd_v2di = 2513,
  CODE_FOR_sse2_shufpd_v2df = 2514,
  CODE_FOR_sse2_storehpd = 2515,
  CODE_FOR_sse2_storelpd = 2517,
  CODE_FOR_sse2_loadhpd = 2519,
  CODE_FOR_sse2_loadlpd = 2520,
  CODE_FOR_sse2_movsd = 2521,
  CODE_FOR_vec_dupv2df = 2522,
  CODE_FOR_vec_dupv2df_mask = 2523,
  CODE_FOR_avx512f_ss_truncatev16siv16qi2_mask = 2537,
  CODE_FOR_avx512f_truncatev16siv16qi2_mask = 2538,
  CODE_FOR_avx512f_us_truncatev16siv16qi2_mask = 2539,
  CODE_FOR_avx512f_ss_truncatev16siv16hi2_mask = 2540,
  CODE_FOR_avx512f_truncatev16siv16hi2_mask = 2541,
  CODE_FOR_avx512f_us_truncatev16siv16hi2_mask = 2542,
  CODE_FOR_avx512f_ss_truncatev8div8si2_mask = 2543,
  CODE_FOR_avx512f_truncatev8div8si2_mask = 2544,
  CODE_FOR_avx512f_us_truncatev8div8si2_mask = 2545,
  CODE_FOR_avx512f_ss_truncatev8div8hi2_mask = 2546,
  CODE_FOR_avx512f_truncatev8div8hi2_mask = 2547,
  CODE_FOR_avx512f_us_truncatev8div8hi2_mask = 2548,
  CODE_FOR_avx512bw_ss_truncatev32hiv32qi2 = 2549,
  CODE_FOR_avx512bw_truncatev32hiv32qi2 = 2550,
  CODE_FOR_avx512bw_us_truncatev32hiv32qi2 = 2551,
  CODE_FOR_avx512bw_ss_truncatev32hiv32qi2_mask = 2552,
  CODE_FOR_avx512bw_truncatev32hiv32qi2_mask = 2553,
  CODE_FOR_avx512bw_us_truncatev32hiv32qi2_mask = 2554,
  CODE_FOR_avx512vl_ss_truncatev4div4si2_mask = 2564,
  CODE_FOR_avx512vl_truncatev4div4si2_mask = 2565,
  CODE_FOR_avx512vl_us_truncatev4div4si2_mask = 2566,
  CODE_FOR_avx512vl_ss_truncatev8siv8hi2_mask = 2567,
  CODE_FOR_avx512vl_truncatev8siv8hi2_mask = 2568,
  CODE_FOR_avx512vl_us_truncatev8siv8hi2_mask = 2569,
  CODE_FOR_avx512vl_ss_truncatev16hiv16qi2_mask = 2570,
  CODE_FOR_avx512vl_truncatev16hiv16qi2_mask = 2571,
  CODE_FOR_avx512vl_us_truncatev16hiv16qi2_mask = 2572,
  CODE_FOR_avx512vl_ss_truncatev2div2qi2_mask = 2591,
  CODE_FOR_avx512vl_truncatev2div2qi2_mask = 2592,
  CODE_FOR_avx512vl_us_truncatev2div2qi2_mask = 2593,
  CODE_FOR_avx512vl_ss_truncatev2div2qi2_mask_store = 2594,
  CODE_FOR_avx512vl_truncatev2div2qi2_mask_store = 2595,
  CODE_FOR_avx512vl_us_truncatev2div2qi2_mask_store = 2596,
  CODE_FOR_avx512vl_ss_truncatev4siv4qi2_mask = 2603,
  CODE_FOR_avx512vl_truncatev4siv4qi2_mask = 2604,
  CODE_FOR_avx512vl_us_truncatev4siv4qi2_mask = 2605,
  CODE_FOR_avx512vl_ss_truncatev4div4qi2_mask = 2606,
  CODE_FOR_avx512vl_truncatev4div4qi2_mask = 2607,
  CODE_FOR_avx512vl_us_truncatev4div4qi2_mask = 2608,
  CODE_FOR_avx512vl_ss_truncatev4siv4qi2_mask_store = 2609,
  CODE_FOR_avx512vl_truncatev4siv4qi2_mask_store = 2610,
  CODE_FOR_avx512vl_us_truncatev4siv4qi2_mask_store = 2611,
  CODE_FOR_avx512vl_ss_truncatev4div4qi2_mask_store = 2612,
  CODE_FOR_avx512vl_truncatev4div4qi2_mask_store = 2613,
  CODE_FOR_avx512vl_us_truncatev4div4qi2_mask_store = 2614,
  CODE_FOR_avx512vl_ss_truncatev8hiv8qi2_mask = 2621,
  CODE_FOR_avx512vl_truncatev8hiv8qi2_mask = 2622,
  CODE_FOR_avx512vl_us_truncatev8hiv8qi2_mask = 2623,
  CODE_FOR_avx512vl_ss_truncatev8siv8qi2_mask = 2624,
  CODE_FOR_avx512vl_truncatev8siv8qi2_mask = 2625,
  CODE_FOR_avx512vl_us_truncatev8siv8qi2_mask = 2626,
  CODE_FOR_avx512vl_ss_truncatev8hiv8qi2_mask_store = 2627,
  CODE_FOR_avx512vl_truncatev8hiv8qi2_mask_store = 2628,
  CODE_FOR_avx512vl_us_truncatev8hiv8qi2_mask_store = 2629,
  CODE_FOR_avx512vl_ss_truncatev8siv8qi2_mask_store = 2630,
  CODE_FOR_avx512vl_truncatev8siv8qi2_mask_store = 2631,
  CODE_FOR_avx512vl_us_truncatev8siv8qi2_mask_store = 2632,
  CODE_FOR_avx512vl_ss_truncatev4siv4hi2_mask = 2648,
  CODE_FOR_avx512vl_truncatev4siv4hi2_mask = 2649,
  CODE_FOR_avx512vl_us_truncatev4siv4hi2_mask = 2650,
  CODE_FOR_avx512vl_ss_truncatev4div4hi2_mask = 2651,
  CODE_FOR_avx512vl_truncatev4div4hi2_mask = 2652,
  CODE_FOR_avx512vl_us_truncatev4div4hi2_mask = 2653,
  CODE_FOR_avx512vl_ss_truncatev4siv4hi2_mask_store = 2654,
  CODE_FOR_avx512vl_truncatev4siv4hi2_mask_store = 2655,
  CODE_FOR_avx512vl_us_truncatev4siv4hi2_mask_store = 2656,
  CODE_FOR_avx512vl_ss_truncatev4div4hi2_mask_store = 2657,
  CODE_FOR_avx512vl_truncatev4div4hi2_mask_store = 2658,
  CODE_FOR_avx512vl_us_truncatev4div4hi2_mask_store = 2659,
  CODE_FOR_avx512vl_ss_truncatev2div2hi2_mask = 2663,
  CODE_FOR_avx512vl_truncatev2div2hi2_mask = 2664,
  CODE_FOR_avx512vl_us_truncatev2div2hi2_mask = 2665,
  CODE_FOR_avx512vl_ss_truncatev2div2hi2_mask_store = 2666,
  CODE_FOR_avx512vl_truncatev2div2hi2_mask_store = 2667,
  CODE_FOR_avx512vl_us_truncatev2div2hi2_mask_store = 2668,
  CODE_FOR_avx512vl_ss_truncatev2div2si2_mask = 2675,
  CODE_FOR_avx512vl_truncatev2div2si2_mask = 2676,
  CODE_FOR_avx512vl_us_truncatev2div2si2_mask = 2677,
  CODE_FOR_avx512vl_ss_truncatev2div2si2_mask_store = 2678,
  CODE_FOR_avx512vl_truncatev2div2si2_mask_store = 2679,
  CODE_FOR_avx512vl_us_truncatev2div2si2_mask_store = 2680,
  CODE_FOR_avx512f_ss_truncatev8div16qi2_mask = 2687,
  CODE_FOR_avx512f_truncatev8div16qi2_mask = 2688,
  CODE_FOR_avx512f_us_truncatev8div16qi2_mask = 2689,
  CODE_FOR_avx512f_ss_truncatev8div16qi2_mask_store = 2690,
  CODE_FOR_avx512f_truncatev8div16qi2_mask_store = 2691,
  CODE_FOR_avx512f_us_truncatev8div16qi2_mask_store = 2692,
  CODE_FOR_avx512bw_pmaddwd512v32hi = 2843,
  CODE_FOR_avx512bw_pmaddwd512v32hi_mask = 2844,
  CODE_FOR_avx512bw_pmaddwd512v16hi = 2845,
  CODE_FOR_avx512bw_pmaddwd512v16hi_mask = 2846,
  CODE_FOR_avx512bw_pmaddwd512v8hi = 2847,
  CODE_FOR_avx512bw_pmaddwd512v8hi_mask = 2848,
  CODE_FOR_avx512dq_mulv8di3 = 2851,
  CODE_FOR_avx512dq_mulv8di3_mask = 2852,
  CODE_FOR_avx512dq_mulv4di3 = 2853,
  CODE_FOR_avx512dq_mulv4di3_mask = 2854,
  CODE_FOR_avx512dq_mulv2di3 = 2855,
  CODE_FOR_avx512dq_mulv2di3_mask = 2856,
  CODE_FOR_ashrv16hi3 = 2863,
  CODE_FOR_ashrv8hi3 = 2864,
  CODE_FOR_ashrv8si3 = 2865,
  CODE_FOR_ashrv4si3 = 2866,
  CODE_FOR_ashrv16hi3_mask = 2868,
  CODE_FOR_ashrv8hi3_mask = 2870,
  CODE_FOR_ashrv8si3_mask = 2872,
  CODE_FOR_ashrv4si3_mask = 2874,
  CODE_FOR_ashrv2di3_mask = 2876,
  CODE_FOR_ashrv32hi3 = 2877,
  CODE_FOR_ashrv32hi3_mask = 2878,
  CODE_FOR_ashrv4di3 = 2879,
  CODE_FOR_ashrv4di3_mask = 2880,
  CODE_FOR_ashrv16si3 = 2881,
  CODE_FOR_ashrv16si3_mask = 2882,
  CODE_FOR_ashrv8di3 = 2883,
  CODE_FOR_ashrv8di3_mask = 2884,
  CODE_FOR_ashlv32hi3 = 2885,
  CODE_FOR_ashlv32hi3_mask = 2886,
  CODE_FOR_lshrv32hi3 = 2887,
  CODE_FOR_lshrv32hi3_mask = 2888,
  CODE_FOR_ashlv16hi3 = 2889,
  CODE_FOR_ashlv16hi3_mask = 2890,
  CODE_FOR_lshrv16hi3 = 2891,
  CODE_FOR_lshrv16hi3_mask = 2892,
  CODE_FOR_ashlv8hi3 = 2893,
  CODE_FOR_ashlv8hi3_mask = 2894,
  CODE_FOR_lshrv8hi3 = 2895,
  CODE_FOR_lshrv8hi3_mask = 2896,
  CODE_FOR_ashlv8si3 = 2897,
  CODE_FOR_ashlv8si3_mask = 2898,
  CODE_FOR_lshrv8si3 = 2899,
  CODE_FOR_lshrv8si3_mask = 2900,
  CODE_FOR_ashlv4si3 = 2901,
  CODE_FOR_ashlv4si3_mask = 2902,
  CODE_FOR_lshrv4si3 = 2903,
  CODE_FOR_lshrv4si3_mask = 2904,
  CODE_FOR_ashlv4di3 = 2905,
  CODE_FOR_ashlv4di3_mask = 2906,
  CODE_FOR_lshrv4di3 = 2907,
  CODE_FOR_lshrv4di3_mask = 2908,
  CODE_FOR_ashlv2di3 = 2909,
  CODE_FOR_ashlv2di3_mask = 2910,
  CODE_FOR_lshrv2di3 = 2911,
  CODE_FOR_lshrv2di3_mask = 2912,
  CODE_FOR_ashlv16si3 = 2913,
  CODE_FOR_ashlv16si3_mask = 2914,
  CODE_FOR_lshrv16si3 = 2915,
  CODE_FOR_lshrv16si3_mask = 2916,
  CODE_FOR_ashlv8di3 = 2917,
  CODE_FOR_ashlv8di3_mask = 2918,
  CODE_FOR_lshrv8di3 = 2919,
  CODE_FOR_lshrv8di3_mask = 2920,
  CODE_FOR_avx512bw_ashlv4ti3 = 2921,
  CODE_FOR_avx2_ashlv2ti3 = 2922,
  CODE_FOR_sse2_ashlv1ti3 = 2923,
  CODE_FOR_avx512bw_lshrv4ti3 = 2924,
  CODE_FOR_avx2_lshrv2ti3 = 2925,
  CODE_FOR_sse2_lshrv1ti3 = 2926,
  CODE_FOR_avx512f_rolvv16si = 2927,
  CODE_FOR_avx512f_rolvv16si_mask = 2928,
  CODE_FOR_avx512f_rorvv16si = 2929,
  CODE_FOR_avx512f_rorvv16si_mask = 2930,
  CODE_FOR_avx512vl_rolvv8si = 2931,
  CODE_FOR_avx512vl_rolvv8si_mask = 2932,
  CODE_FOR_avx512vl_rorvv8si = 2933,
  CODE_FOR_avx512vl_rorvv8si_mask = 2934,
  CODE_FOR_avx512vl_rolvv4si = 2935,
  CODE_FOR_avx512vl_rolvv4si_mask = 2936,
  CODE_FOR_avx512vl_rorvv4si = 2937,
  CODE_FOR_avx512vl_rorvv4si_mask = 2938,
  CODE_FOR_avx512f_rolvv8di = 2939,
  CODE_FOR_avx512f_rolvv8di_mask = 2940,
  CODE_FOR_avx512f_rorvv8di = 2941,
  CODE_FOR_avx512f_rorvv8di_mask = 2942,
  CODE_FOR_avx512vl_rolvv4di = 2943,
  CODE_FOR_avx512vl_rolvv4di_mask = 2944,
  CODE_FOR_avx512vl_rorvv4di = 2945,
  CODE_FOR_avx512vl_rorvv4di_mask = 2946,
  CODE_FOR_avx512vl_rolvv2di = 2947,
  CODE_FOR_avx512vl_rolvv2di_mask = 2948,
  CODE_FOR_avx512vl_rorvv2di = 2949,
  CODE_FOR_avx512vl_rorvv2di_mask = 2950,
  CODE_FOR_avx512f_rolv16si = 2951,
  CODE_FOR_avx512f_rolv16si_mask = 2952,
  CODE_FOR_avx512f_rorv16si = 2953,
  CODE_FOR_avx512f_rorv16si_mask = 2954,
  CODE_FOR_avx512vl_rolv8si = 2955,
  CODE_FOR_avx512vl_rolv8si_mask = 2956,
  CODE_FOR_avx512vl_rorv8si = 2957,
  CODE_FOR_avx512vl_rorv8si_mask = 2958,
  CODE_FOR_avx512vl_rolv4si = 2959,
  CODE_FOR_avx512vl_rolv4si_mask = 2960,
  CODE_FOR_avx512vl_rorv4si = 2961,
  CODE_FOR_avx512vl_rorv4si_mask = 2962,
  CODE_FOR_avx512f_rolv8di = 2963,
  CODE_FOR_avx512f_rolv8di_mask = 2964,
  CODE_FOR_avx512f_rorv8di = 2965,
  CODE_FOR_avx512f_rorv8di_mask = 2966,
  CODE_FOR_avx512vl_rolv4di = 2967,
  CODE_FOR_avx512vl_rolv4di_mask = 2968,
  CODE_FOR_avx512vl_rorv4di = 2969,
  CODE_FOR_avx512vl_rorv4di_mask = 2970,
  CODE_FOR_avx512vl_rolv2di = 2971,
  CODE_FOR_avx512vl_rolv2di_mask = 2972,
  CODE_FOR_avx512vl_rorv2di = 2973,
  CODE_FOR_avx512vl_rorv2di_mask = 2974,
  CODE_FOR_smaxv64qi3_mask = 3036,
  CODE_FOR_sminv64qi3_mask = 3038,
  CODE_FOR_umaxv64qi3_mask = 3040,
  CODE_FOR_uminv64qi3_mask = 3042,
  CODE_FOR_smaxv16qi3_mask = 3044,
  CODE_FOR_sminv16qi3_mask = 3046,
  CODE_FOR_umaxv16qi3_mask = 3048,
  CODE_FOR_uminv16qi3_mask = 3050,
  CODE_FOR_smaxv32qi3_mask = 3052,
  CODE_FOR_sminv32qi3_mask = 3054,
  CODE_FOR_umaxv32qi3_mask = 3056,
  CODE_FOR_uminv32qi3_mask = 3058,
  CODE_FOR_smaxv32hi3_mask = 3060,
  CODE_FOR_sminv32hi3_mask = 3062,
  CODE_FOR_umaxv32hi3_mask = 3064,
  CODE_FOR_uminv32hi3_mask = 3066,
  CODE_FOR_smaxv16hi3_mask = 3068,
  CODE_FOR_sminv16hi3_mask = 3070,
  CODE_FOR_umaxv16hi3_mask = 3072,
  CODE_FOR_uminv16hi3_mask = 3074,
  CODE_FOR_smaxv8hi3_mask = 3076,
  CODE_FOR_sminv8hi3_mask = 3078,
  CODE_FOR_umaxv8hi3_mask = 3080,
  CODE_FOR_uminv8hi3_mask = 3082,
  CODE_FOR_avx512bw_eqv64qi3_1 = 3107,
  CODE_FOR_avx512bw_eqv64qi3_mask_1 = 3108,
  CODE_FOR_avx512vl_eqv16qi3_1 = 3109,
  CODE_FOR_avx512vl_eqv16qi3_mask_1 = 3110,
  CODE_FOR_avx512vl_eqv32qi3_1 = 3111,
  CODE_FOR_avx512vl_eqv32qi3_mask_1 = 3112,
  CODE_FOR_avx512bw_eqv32hi3_1 = 3113,
  CODE_FOR_avx512bw_eqv32hi3_mask_1 = 3114,
  CODE_FOR_avx512vl_eqv16hi3_1 = 3115,
  CODE_FOR_avx512vl_eqv16hi3_mask_1 = 3116,
  CODE_FOR_avx512vl_eqv8hi3_1 = 3117,
  CODE_FOR_avx512vl_eqv8hi3_mask_1 = 3118,
  CODE_FOR_avx512f_eqv16si3_1 = 3119,
  CODE_FOR_avx512f_eqv16si3_mask_1 = 3120,
  CODE_FOR_avx512vl_eqv8si3_1 = 3121,
  CODE_FOR_avx512vl_eqv8si3_mask_1 = 3122,
  CODE_FOR_avx512vl_eqv4si3_1 = 3123,
  CODE_FOR_avx512vl_eqv4si3_mask_1 = 3124,
  CODE_FOR_avx512f_eqv8di3_1 = 3125,
  CODE_FOR_avx512f_eqv8di3_mask_1 = 3126,
  CODE_FOR_avx512vl_eqv4di3_1 = 3127,
  CODE_FOR_avx512vl_eqv4di3_mask_1 = 3128,
  CODE_FOR_avx512vl_eqv2di3_1 = 3129,
  CODE_FOR_avx512vl_eqv2di3_mask_1 = 3130,
  CODE_FOR_sse4_2_gtv2di3 = 3135,
  CODE_FOR_avx2_gtv32qi3 = 3136,
  CODE_FOR_avx2_gtv16hi3 = 3137,
  CODE_FOR_avx2_gtv8si3 = 3138,
  CODE_FOR_avx2_gtv4di3 = 3139,
  CODE_FOR_avx512f_gtv16si3 = 3140,
  CODE_FOR_avx512f_gtv16si3_mask = 3141,
  CODE_FOR_avx512vl_gtv8si3 = 3142,
  CODE_FOR_avx512vl_gtv8si3_mask = 3143,
  CODE_FOR_avx512vl_gtv4si3 = 3144,
  CODE_FOR_avx512vl_gtv4si3_mask = 3145,
  CODE_FOR_avx512f_gtv8di3 = 3146,
  CODE_FOR_avx512f_gtv8di3_mask = 3147,
  CODE_FOR_avx512vl_gtv4di3 = 3148,
  CODE_FOR_avx512vl_gtv4di3_mask = 3149,
  CODE_FOR_avx512vl_gtv2di3 = 3150,
  CODE_FOR_avx512vl_gtv2di3_mask = 3151,
  CODE_FOR_avx512bw_gtv64qi3 = 3152,
  CODE_FOR_avx512bw_gtv64qi3_mask = 3153,
  CODE_FOR_avx512vl_gtv16qi3 = 3154,
  CODE_FOR_avx512vl_gtv16qi3_mask = 3155,
  CODE_FOR_avx512vl_gtv32qi3 = 3156,
  CODE_FOR_avx512vl_gtv32qi3_mask = 3157,
  CODE_FOR_avx512bw_gtv32hi3 = 3158,
  CODE_FOR_avx512bw_gtv32hi3_mask = 3159,
  CODE_FOR_avx512vl_gtv16hi3 = 3160,
  CODE_FOR_avx512vl_gtv16hi3_mask = 3161,
  CODE_FOR_avx512vl_gtv8hi3 = 3162,
  CODE_FOR_avx512vl_gtv8hi3_mask = 3163,
  CODE_FOR_sse2_gtv16qi3 = 3164,
  CODE_FOR_sse2_gtv8hi3 = 3165,
  CODE_FOR_sse2_gtv4si3 = 3166,
  CODE_FOR_andv16si3_mask = 3186,
  CODE_FOR_iorv16si3_mask = 3188,
  CODE_FOR_xorv16si3_mask = 3190,
  CODE_FOR_andv8si3_mask = 3192,
  CODE_FOR_iorv8si3_mask = 3194,
  CODE_FOR_xorv8si3_mask = 3196,
  CODE_FOR_andv4si3_mask = 3198,
  CODE_FOR_iorv4si3_mask = 3200,
  CODE_FOR_xorv4si3_mask = 3202,
  CODE_FOR_andv8di3_mask = 3204,
  CODE_FOR_iorv8di3_mask = 3206,
  CODE_FOR_xorv8di3_mask = 3208,
  CODE_FOR_andv4di3_mask = 3210,
  CODE_FOR_iorv4di3_mask = 3212,
  CODE_FOR_xorv4di3_mask = 3214,
  CODE_FOR_andv2di3_mask = 3216,
  CODE_FOR_iorv2di3_mask = 3218,
  CODE_FOR_xorv2di3_mask = 3220,
  CODE_FOR_avx512bw_testmv64qi3 = 3257,
  CODE_FOR_avx512bw_testmv64qi3_mask = 3258,
  CODE_FOR_avx512vl_testmv16qi3 = 3259,
  CODE_FOR_avx512vl_testmv16qi3_mask = 3260,
  CODE_FOR_avx512vl_testmv32qi3 = 3261,
  CODE_FOR_avx512vl_testmv32qi3_mask = 3262,
  CODE_FOR_avx512bw_testmv32hi3 = 3263,
  CODE_FOR_avx512bw_testmv32hi3_mask = 3264,
  CODE_FOR_avx512vl_testmv16hi3 = 3265,
  CODE_FOR_avx512vl_testmv16hi3_mask = 3266,
  CODE_FOR_avx512vl_testmv8hi3 = 3267,
  CODE_FOR_avx512vl_testmv8hi3_mask = 3268,
  CODE_FOR_avx512f_testmv16si3 = 3269,
  CODE_FOR_avx512f_testmv16si3_mask = 3270,
  CODE_FOR_avx512vl_testmv8si3 = 3271,
  CODE_FOR_avx512vl_testmv8si3_mask = 3272,
  CODE_FOR_avx512vl_testmv4si3 = 3273,
  CODE_FOR_avx512vl_testmv4si3_mask = 3274,
  CODE_FOR_avx512f_testmv8di3 = 3275,
  CODE_FOR_avx512f_testmv8di3_mask = 3276,
  CODE_FOR_avx512vl_testmv4di3 = 3277,
  CODE_FOR_avx512vl_testmv4di3_mask = 3278,
  CODE_FOR_avx512vl_testmv2di3 = 3279,
  CODE_FOR_avx512vl_testmv2di3_mask = 3280,
  CODE_FOR_avx512bw_testnmv64qi3 = 3281,
  CODE_FOR_avx512bw_testnmv64qi3_mask = 3282,
  CODE_FOR_avx512vl_testnmv16qi3 = 3283,
  CODE_FOR_avx512vl_testnmv16qi3_mask = 3284,
  CODE_FOR_avx512vl_testnmv32qi3 = 3285,
  CODE_FOR_avx512vl_testnmv32qi3_mask = 3286,
  CODE_FOR_avx512bw_testnmv32hi3 = 3287,
  CODE_FOR_avx512bw_testnmv32hi3_mask = 3288,
  CODE_FOR_avx512vl_testnmv16hi3 = 3289,
  CODE_FOR_avx512vl_testnmv16hi3_mask = 3290,
  CODE_FOR_avx512vl_testnmv8hi3 = 3291,
  CODE_FOR_avx512vl_testnmv8hi3_mask = 3292,
  CODE_FOR_avx512f_testnmv16si3 = 3293,
  CODE_FOR_avx512f_testnmv16si3_mask = 3294,
  CODE_FOR_avx512vl_testnmv8si3 = 3295,
  CODE_FOR_avx512vl_testnmv8si3_mask = 3296,
  CODE_FOR_avx512vl_testnmv4si3 = 3297,
  CODE_FOR_avx512vl_testnmv4si3_mask = 3298,
  CODE_FOR_avx512f_testnmv8di3 = 3299,
  CODE_FOR_avx512f_testnmv8di3_mask = 3300,
  CODE_FOR_avx512vl_testnmv4di3 = 3301,
  CODE_FOR_avx512vl_testnmv4di3_mask = 3302,
  CODE_FOR_avx512vl_testnmv2di3 = 3303,
  CODE_FOR_avx512vl_testnmv2di3_mask = 3304,
  CODE_FOR_avx512bw_packsswb = 3305,
  CODE_FOR_avx512bw_packsswb_mask = 3306,
  CODE_FOR_avx2_packsswb = 3307,
  CODE_FOR_avx2_packsswb_mask = 3308,
  CODE_FOR_sse2_packsswb = 3309,
  CODE_FOR_sse2_packsswb_mask = 3310,
  CODE_FOR_avx512bw_packssdw = 3311,
  CODE_FOR_avx512bw_packssdw_mask = 3312,
  CODE_FOR_avx2_packssdw = 3313,
  CODE_FOR_avx2_packssdw_mask = 3314,
  CODE_FOR_sse2_packssdw = 3315,
  CODE_FOR_sse2_packssdw_mask = 3316,
  CODE_FOR_avx512bw_packuswb = 3317,
  CODE_FOR_avx512bw_packuswb_mask = 3318,
  CODE_FOR_avx2_packuswb = 3319,
  CODE_FOR_avx2_packuswb_mask = 3320,
  CODE_FOR_sse2_packuswb = 3321,
  CODE_FOR_sse2_packuswb_mask = 3322,
  CODE_FOR_avx512bw_interleave_highv64qi = 3323,
  CODE_FOR_avx512bw_interleave_highv64qi_mask = 3324,
  CODE_FOR_avx2_interleave_highv32qi = 3325,
  CODE_FOR_avx2_interleave_highv32qi_mask = 3326,
  CODE_FOR_vec_interleave_highv16qi = 3327,
  CODE_FOR_vec_interleave_highv16qi_mask = 3328,
  CODE_FOR_avx512bw_interleave_lowv64qi = 3329,
  CODE_FOR_avx512bw_interleave_lowv64qi_mask = 3330,
  CODE_FOR_avx2_interleave_lowv32qi = 3331,
  CODE_FOR_avx2_interleave_lowv32qi_mask = 3332,
  CODE_FOR_vec_interleave_lowv16qi = 3333,
  CODE_FOR_vec_interleave_lowv16qi_mask = 3334,
  CODE_FOR_avx512bw_interleave_highv32hi = 3335,
  CODE_FOR_avx512bw_interleave_highv32hi_mask = 3336,
  CODE_FOR_avx2_interleave_highv16hi = 3337,
  CODE_FOR_avx2_interleave_highv16hi_mask = 3338,
  CODE_FOR_vec_interleave_highv8hi = 3339,
  CODE_FOR_vec_interleave_highv8hi_mask = 3340,
  CODE_FOR_avx512bw_interleave_lowv32hi_mask = 3342,
  CODE_FOR_avx2_interleave_lowv16hi = 3343,
  CODE_FOR_avx2_interleave_lowv16hi_mask = 3344,
  CODE_FOR_vec_interleave_lowv8hi = 3345,
  CODE_FOR_vec_interleave_lowv8hi_mask = 3346,
  CODE_FOR_avx2_interleave_highv8si = 3347,
  CODE_FOR_avx2_interleave_highv8si_mask = 3348,
  CODE_FOR_avx512f_interleave_highv16si_mask = 3350,
  CODE_FOR_vec_interleave_highv4si = 3351,
  CODE_FOR_vec_interleave_highv4si_mask = 3352,
  CODE_FOR_avx2_interleave_lowv8si = 3353,
  CODE_FOR_avx2_interleave_lowv8si_mask = 3354,
  CODE_FOR_avx512f_interleave_lowv16si_mask = 3356,
  CODE_FOR_vec_interleave_lowv4si = 3357,
  CODE_FOR_vec_interleave_lowv4si_mask = 3358,
  CODE_FOR_sse4_1_pinsrb = 3359,
  CODE_FOR_sse2_pinsrw = 3360,
  CODE_FOR_sse4_1_pinsrd = 3361,
  CODE_FOR_sse4_1_pinsrq = 3362,
  CODE_FOR_avx512dq_vinsertf64x2_1_mask = 3364,
  CODE_FOR_avx512dq_vinserti64x2_1_mask = 3366,
  CODE_FOR_avx512f_vinsertf32x4_1_mask = 3368,
  CODE_FOR_avx512f_vinserti32x4_1_mask = 3370,
  CODE_FOR_vec_set_lo_v16sf = 3371,
  CODE_FOR_vec_set_lo_v16sf_mask = 3372,
  CODE_FOR_vec_set_lo_v16si = 3373,
  CODE_FOR_vec_set_lo_v16si_mask = 3374,
  CODE_FOR_vec_set_hi_v16sf = 3375,
  CODE_FOR_vec_set_hi_v16sf_mask = 3376,
  CODE_FOR_vec_set_hi_v16si = 3377,
  CODE_FOR_vec_set_hi_v16si_mask = 3378,
  CODE_FOR_vec_set_lo_v8df = 3379,
  CODE_FOR_vec_set_lo_v8df_mask = 3380,
  CODE_FOR_vec_set_lo_v8di = 3381,
  CODE_FOR_vec_set_lo_v8di_mask = 3382,
  CODE_FOR_vec_set_hi_v8df = 3383,
  CODE_FOR_vec_set_hi_v8df_mask = 3384,
  CODE_FOR_vec_set_hi_v8di = 3385,
  CODE_FOR_vec_set_hi_v8di_mask = 3386,
  CODE_FOR_avx512dq_shuf_i64x2_1_mask = 3388,
  CODE_FOR_avx512dq_shuf_f64x2_1_mask = 3390,
  CODE_FOR_avx512f_shuf_f64x2_1 = 3391,
  CODE_FOR_avx512f_shuf_f64x2_1_mask = 3392,
  CODE_FOR_avx512f_shuf_i64x2_1 = 3393,
  CODE_FOR_avx512f_shuf_i64x2_1_mask = 3394,
  CODE_FOR_avx512vl_shuf_i32x4_1_mask = 3396,
  CODE_FOR_avx512vl_shuf_f32x4_1_mask = 3398,
  CODE_FOR_avx512f_shuf_f32x4_1 = 3399,
  CODE_FOR_avx512f_shuf_f32x4_1_mask = 3400,
  CODE_FOR_avx512f_shuf_i32x4_1 = 3401,
  CODE_FOR_avx512f_shuf_i32x4_1_mask = 3402,
  CODE_FOR_avx512f_pshufd_1 = 3403,
  CODE_FOR_avx512f_pshufd_1_mask = 3404,
  CODE_FOR_avx2_pshufd_1 = 3405,
  CODE_FOR_avx2_pshufd_1_mask = 3406,
  CODE_FOR_sse2_pshufd_1 = 3407,
  CODE_FOR_sse2_pshufd_1_mask = 3408,
  CODE_FOR_avx512bw_pshuflwv32hi_mask = 3410,
  CODE_FOR_avx2_pshuflw_1 = 3411,
  CODE_FOR_avx2_pshuflw_1_mask = 3412,
  CODE_FOR_sse2_pshuflw_1 = 3413,
  CODE_FOR_sse2_pshuflw_1_mask = 3414,
  CODE_FOR_avx512bw_pshufhwv32hi_mask = 3416,
  CODE_FOR_avx2_pshufhw_1 = 3417,
  CODE_FOR_avx2_pshufhw_1_mask = 3418,
  CODE_FOR_sse2_pshufhw_1 = 3419,
  CODE_FOR_sse2_pshufhw_1_mask = 3420,
  CODE_FOR_sse2_loadld = 3421,
  CODE_FOR_vec_concatv2di = 3437,
  CODE_FOR_avx512f_psadbw = 3450,
  CODE_FOR_avx2_psadbw = 3451,
  CODE_FOR_sse2_psadbw = 3452,
  CODE_FOR_avx_movmskps256 = 3453,
  CODE_FOR_sse_movmskps = 3454,
  CODE_FOR_avx_movmskpd256 = 3455,
  CODE_FOR_sse2_movmskpd = 3456,
  CODE_FOR_avx2_pmovmskb = 3457,
  CODE_FOR_sse2_pmovmskb = 3458,
  CODE_FOR_sse_ldmxcsr = 3461,
  CODE_FOR_sse_stmxcsr = 3462,
  CODE_FOR_sse2_clflush = 3463,
  CODE_FOR_sse3_mwait = 3464,
  CODE_FOR_sse3_monitor_si = 3465,
  CODE_FOR_sse3_monitor_di = 3466,
  CODE_FOR_avx2_phaddwv16hi3 = 3467,
  CODE_FOR_avx2_phaddswv16hi3 = 3468,
  CODE_FOR_avx2_phsubwv16hi3 = 3469,
  CODE_FOR_avx2_phsubswv16hi3 = 3470,
  CODE_FOR_ssse3_phaddwv8hi3 = 3471,
  CODE_FOR_ssse3_phaddswv8hi3 = 3472,
  CODE_FOR_ssse3_phsubwv8hi3 = 3473,
  CODE_FOR_ssse3_phsubswv8hi3 = 3474,
  CODE_FOR_ssse3_phaddwv4hi3 = 3475,
  CODE_FOR_ssse3_phaddswv4hi3 = 3476,
  CODE_FOR_ssse3_phsubwv4hi3 = 3477,
  CODE_FOR_ssse3_phsubswv4hi3 = 3478,
  CODE_FOR_avx2_phadddv8si3 = 3479,
  CODE_FOR_avx2_phsubdv8si3 = 3480,
  CODE_FOR_ssse3_phadddv4si3 = 3481,
  CODE_FOR_ssse3_phsubdv4si3 = 3482,
  CODE_FOR_ssse3_phadddv2si3 = 3483,
  CODE_FOR_ssse3_phsubdv2si3 = 3484,
  CODE_FOR_avx2_pmaddubsw256 = 3485,
  CODE_FOR_avx512bw_pmaddubsw512v8hi = 3486,
  CODE_FOR_avx512bw_pmaddubsw512v8hi_mask = 3487,
  CODE_FOR_avx512bw_pmaddubsw512v16hi = 3488,
  CODE_FOR_avx512bw_pmaddubsw512v16hi_mask = 3489,
  CODE_FOR_avx512bw_pmaddubsw512v32hi = 3490,
  CODE_FOR_avx512bw_pmaddubsw512v32hi_mask = 3491,
  CODE_FOR_avx512bw_umulhrswv32hi3 = 3492,
  CODE_FOR_avx512bw_umulhrswv32hi3_mask = 3493,
  CODE_FOR_ssse3_pmaddubsw128 = 3494,
  CODE_FOR_ssse3_pmaddubsw = 3495,
  CODE_FOR_avx512bw_pshufbv64qi3 = 3503,
  CODE_FOR_avx512bw_pshufbv64qi3_mask = 3504,
  CODE_FOR_avx2_pshufbv32qi3 = 3505,
  CODE_FOR_avx2_pshufbv32qi3_mask = 3506,
  CODE_FOR_ssse3_pshufbv16qi3 = 3507,
  CODE_FOR_ssse3_pshufbv16qi3_mask = 3508,
  CODE_FOR_ssse3_pshufbv8qi3 = 3509,
  CODE_FOR_avx2_psignv32qi3 = 3510,
  CODE_FOR_ssse3_psignv16qi3 = 3511,
  CODE_FOR_avx2_psignv16hi3 = 3512,
  CODE_FOR_ssse3_psignv8hi3 = 3513,
  CODE_FOR_avx2_psignv8si3 = 3514,
  CODE_FOR_ssse3_psignv4si3 = 3515,
  CODE_FOR_ssse3_psignv8qi3 = 3516,
  CODE_FOR_ssse3_psignv4hi3 = 3517,
  CODE_FOR_ssse3_psignv2si3 = 3518,
  CODE_FOR_avx512bw_palignrv64qi_mask = 3519,
  CODE_FOR_avx2_palignrv32qi_mask = 3520,
  CODE_FOR_ssse3_palignrv16qi_mask = 3521,
  CODE_FOR_avx512bw_palignrv4ti = 3522,
  CODE_FOR_avx2_palignrv2ti = 3523,
  CODE_FOR_ssse3_palignrti = 3524,
  CODE_FOR_ssse3_palignrdi = 3525,
  CODE_FOR_absv16si2_mask = 3538,
  CODE_FOR_absv8si2_mask = 3539,
  CODE_FOR_absv4si2_mask = 3540,
  CODE_FOR_absv8di2_mask = 3541,
  CODE_FOR_absv4di2_mask = 3542,
  CODE_FOR_absv2di2_mask = 3543,
  CODE_FOR_absv64qi2_mask = 3544,
  CODE_FOR_absv16qi2_mask = 3545,
  CODE_FOR_absv32qi2_mask = 3546,
  CODE_FOR_absv32hi2_mask = 3547,
  CODE_FOR_absv16hi2_mask = 3548,
  CODE_FOR_absv8hi2_mask = 3549,
  CODE_FOR_absv8qi2 = 3550,
  CODE_FOR_absv4hi2 = 3551,
  CODE_FOR_absv2si2 = 3552,
  CODE_FOR_sse4a_movntsf = 3553,
  CODE_FOR_sse4a_movntdf = 3554,
  CODE_FOR_sse4a_vmmovntv4sf = 3555,
  CODE_FOR_sse4a_vmmovntv2df = 3556,
  CODE_FOR_sse4a_extrqi = 3557,
  CODE_FOR_sse4a_extrq = 3558,
  CODE_FOR_sse4a_insertqi = 3559,
  CODE_FOR_sse4a_insertq = 3560,
  CODE_FOR_avx_blendps256 = 3561,
  CODE_FOR_sse4_1_blendps = 3562,
  CODE_FOR_avx_blendpd256 = 3563,
  CODE_FOR_sse4_1_blendpd = 3564,
  CODE_FOR_avx_blendvps256 = 3565,
  CODE_FOR_sse4_1_blendvps = 3566,
  CODE_FOR_avx_blendvpd256 = 3567,
  CODE_FOR_sse4_1_blendvpd = 3568,
  CODE_FOR_avx_dpps256 = 3569,
  CODE_FOR_sse4_1_dpps = 3570,
  CODE_FOR_avx_dppd256 = 3571,
  CODE_FOR_sse4_1_dppd = 3572,
  CODE_FOR_avx512f_movntdqa = 3573,
  CODE_FOR_avx2_movntdqa = 3574,
  CODE_FOR_sse4_1_movntdqa = 3575,
  CODE_FOR_avx2_mpsadbw = 3576,
  CODE_FOR_sse4_1_mpsadbw = 3577,
  CODE_FOR_avx512bw_packusdw = 3578,
  CODE_FOR_avx512bw_packusdw_mask = 3579,
  CODE_FOR_avx2_packusdw = 3580,
  CODE_FOR_avx2_packusdw_mask = 3581,
  CODE_FOR_sse4_1_packusdw = 3582,
  CODE_FOR_sse4_1_packusdw_mask = 3583,
  CODE_FOR_avx2_pblendvb = 3584,
  CODE_FOR_sse4_1_pblendvb = 3585,
  CODE_FOR_sse4_1_pblendw = 3586,
  CODE_FOR_avx2_pblenddv8si = 3588,
  CODE_FOR_avx2_pblenddv4si = 3589,
  CODE_FOR_sse4_1_phminposuw = 3590,
  CODE_FOR_avx2_sign_extendv16qiv16hi2 = 3591,
  CODE_FOR_avx2_sign_extendv16qiv16hi2_mask = 3592,
  CODE_FOR_avx2_zero_extendv16qiv16hi2 = 3593,
  CODE_FOR_avx2_zero_extendv16qiv16hi2_mask = 3594,
  CODE_FOR_avx512bw_sign_extendv32qiv32hi2 = 3595,
  CODE_FOR_avx512bw_sign_extendv32qiv32hi2_mask = 3596,
  CODE_FOR_avx512bw_zero_extendv32qiv32hi2 = 3597,
  CODE_FOR_avx512bw_zero_extendv32qiv32hi2_mask = 3598,
  CODE_FOR_sse4_1_sign_extendv8qiv8hi2 = 3599,
  CODE_FOR_sse4_1_sign_extendv8qiv8hi2_mask = 3600,
  CODE_FOR_sse4_1_zero_extendv8qiv8hi2 = 3601,
  CODE_FOR_sse4_1_zero_extendv8qiv8hi2_mask = 3602,
  CODE_FOR_avx512f_sign_extendv16qiv16si2_mask = 3604,
  CODE_FOR_avx512f_zero_extendv16qiv16si2_mask = 3606,
  CODE_FOR_avx2_sign_extendv8qiv8si2 = 3607,
  CODE_FOR_avx2_sign_extendv8qiv8si2_mask = 3608,
  CODE_FOR_avx2_zero_extendv8qiv8si2 = 3609,
  CODE_FOR_avx2_zero_extendv8qiv8si2_mask = 3610,
  CODE_FOR_sse4_1_sign_extendv4qiv4si2 = 3611,
  CODE_FOR_sse4_1_sign_extendv4qiv4si2_mask = 3612,
  CODE_FOR_sse4_1_zero_extendv4qiv4si2 = 3613,
  CODE_FOR_sse4_1_zero_extendv4qiv4si2_mask = 3614,
  CODE_FOR_avx512f_sign_extendv16hiv16si2 = 3615,
  CODE_FOR_avx512f_sign_extendv16hiv16si2_mask = 3616,
  CODE_FOR_avx512f_zero_extendv16hiv16si2 = 3617,
  CODE_FOR_avx512f_zero_extendv16hiv16si2_mask = 3618,
  CODE_FOR_avx2_sign_extendv8hiv8si2 = 3619,
  CODE_FOR_avx2_sign_extendv8hiv8si2_mask = 3620,
  CODE_FOR_avx2_zero_extendv8hiv8si2 = 3621,
  CODE_FOR_avx2_zero_extendv8hiv8si2_mask = 3622,
  CODE_FOR_sse4_1_sign_extendv4hiv4si2 = 3623,
  CODE_FOR_sse4_1_sign_extendv4hiv4si2_mask = 3624,
  CODE_FOR_sse4_1_zero_extendv4hiv4si2 = 3625,
  CODE_FOR_sse4_1_zero_extendv4hiv4si2_mask = 3626,
  CODE_FOR_avx512f_sign_extendv8qiv8di2 = 3627,
  CODE_FOR_avx512f_sign_extendv8qiv8di2_mask = 3628,
  CODE_FOR_avx512f_zero_extendv8qiv8di2 = 3629,
  CODE_FOR_avx512f_zero_extendv8qiv8di2_mask = 3630,
  CODE_FOR_avx2_sign_extendv4qiv4di2 = 3631,
  CODE_FOR_avx2_sign_extendv4qiv4di2_mask = 3632,
  CODE_FOR_avx2_zero_extendv4qiv4di2 = 3633,
  CODE_FOR_avx2_zero_extendv4qiv4di2_mask = 3634,
  CODE_FOR_sse4_1_sign_extendv2qiv2di2 = 3635,
  CODE_FOR_sse4_1_sign_extendv2qiv2di2_mask = 3636,
  CODE_FOR_sse4_1_zero_extendv2qiv2di2 = 3637,
  CODE_FOR_sse4_1_zero_extendv2qiv2di2_mask = 3638,
  CODE_FOR_avx512f_sign_extendv8hiv8di2 = 3639,
  CODE_FOR_avx512f_sign_extendv8hiv8di2_mask = 3640,
  CODE_FOR_avx512f_zero_extendv8hiv8di2 = 3641,
  CODE_FOR_avx512f_zero_extendv8hiv8di2_mask = 3642,
  CODE_FOR_avx2_sign_extendv4hiv4di2 = 3643,
  CODE_FOR_avx2_sign_extendv4hiv4di2_mask = 3644,
  CODE_FOR_avx2_zero_extendv4hiv4di2 = 3645,
  CODE_FOR_avx2_zero_extendv4hiv4di2_mask = 3646,
  CODE_FOR_sse4_1_sign_extendv2hiv2di2 = 3647,
  CODE_FOR_sse4_1_sign_extendv2hiv2di2_mask = 3648,
  CODE_FOR_sse4_1_zero_extendv2hiv2di2 = 3649,
  CODE_FOR_sse4_1_zero_extendv2hiv2di2_mask = 3650,
  CODE_FOR_avx512f_sign_extendv8siv8di2 = 3651,
  CODE_FOR_avx512f_sign_extendv8siv8di2_mask = 3652,
  CODE_FOR_avx512f_zero_extendv8siv8di2 = 3653,
  CODE_FOR_avx512f_zero_extendv8siv8di2_mask = 3654,
  CODE_FOR_avx2_sign_extendv4siv4di2 = 3655,
  CODE_FOR_avx2_sign_extendv4siv4di2_mask = 3656,
  CODE_FOR_avx2_zero_extendv4siv4di2 = 3657,
  CODE_FOR_avx2_zero_extendv4siv4di2_mask = 3658,
  CODE_FOR_sse4_1_sign_extendv2siv2di2 = 3659,
  CODE_FOR_sse4_1_sign_extendv2siv2di2_mask = 3660,
  CODE_FOR_sse4_1_zero_extendv2siv2di2 = 3661,
  CODE_FOR_sse4_1_zero_extendv2siv2di2_mask = 3662,
  CODE_FOR_avx_vtestps256 = 3663,
  CODE_FOR_avx_vtestps = 3664,
  CODE_FOR_avx_vtestpd256 = 3665,
  CODE_FOR_avx_vtestpd = 3666,
  CODE_FOR_avx_ptest256 = 3667,
  CODE_FOR_sse4_1_ptest = 3668,
  CODE_FOR_avx_roundps256 = 3669,
  CODE_FOR_sse4_1_roundps = 3670,
  CODE_FOR_avx_roundpd256 = 3671,
  CODE_FOR_sse4_1_roundpd = 3672,
  CODE_FOR_sse4_1_roundss = 3673,
  CODE_FOR_sse4_1_roundsd = 3674,
  CODE_FOR_sse4_2_pcmpestr = 3675,
  CODE_FOR_sse4_2_pcmpestri = 3677,
  CODE_FOR_sse4_2_pcmpestrm = 3678,
  CODE_FOR_sse4_2_pcmpestr_cconly = 3679,
  CODE_FOR_sse4_2_pcmpistr = 3680,
  CODE_FOR_sse4_2_pcmpistri = 3682,
  CODE_FOR_sse4_2_pcmpistrm = 3683,
  CODE_FOR_sse4_2_pcmpistr_cconly = 3684,
  CODE_FOR_avx512er_exp2v16sf = 3701,
  CODE_FOR_avx512er_exp2v16sf_round = 3702,
  CODE_FOR_avx512er_exp2v16sf_mask = 3703,
  CODE_FOR_avx512er_exp2v16sf_mask_round = 3704,
  CODE_FOR_avx512er_exp2v8df = 3705,
  CODE_FOR_avx512er_exp2v8df_round = 3706,
  CODE_FOR_avx512er_exp2v8df_mask = 3707,
  CODE_FOR_avx512er_exp2v8df_mask_round = 3708,
  CODE_FOR_avx512er_rcp28v16sf_mask = 3711,
  CODE_FOR_avx512er_rcp28v16sf_mask_round = 3712,
  CODE_FOR_avx512er_rcp28v8df_mask = 3715,
  CODE_FOR_avx512er_rcp28v8df_mask_round = 3716,
  CODE_FOR_avx512er_vmrcp28v4sf = 3717,
  CODE_FOR_avx512er_vmrcp28v4sf_round = 3718,
  CODE_FOR_avx512er_vmrcp28v2df = 3719,
  CODE_FOR_avx512er_vmrcp28v2df_round = 3720,
  CODE_FOR_avx512er_rsqrt28v16sf_mask = 3723,
  CODE_FOR_avx512er_rsqrt28v16sf_mask_round = 3724,
  CODE_FOR_avx512er_rsqrt28v8df_mask = 3727,
  CODE_FOR_avx512er_rsqrt28v8df_mask_round = 3728,
  CODE_FOR_avx512er_vmrsqrt28v4sf = 3729,
  CODE_FOR_avx512er_vmrsqrt28v4sf_round = 3730,
  CODE_FOR_avx512er_vmrsqrt28v2df = 3731,
  CODE_FOR_avx512er_vmrsqrt28v2df_round = 3732,
  CODE_FOR_xop_pmacsww = 3733,
  CODE_FOR_xop_pmacssww = 3734,
  CODE_FOR_xop_pmacsdd = 3735,
  CODE_FOR_xop_pmacssdd = 3736,
  CODE_FOR_xop_pmacsdql = 3737,
  CODE_FOR_xop_pmacssdql = 3738,
  CODE_FOR_xop_pmacsdqh = 3739,
  CODE_FOR_xop_pmacssdqh = 3740,
  CODE_FOR_xop_pmacswd = 3741,
  CODE_FOR_xop_pmacsswd = 3742,
  CODE_FOR_xop_pmadcswd = 3743,
  CODE_FOR_xop_pmadcsswd = 3744,
  CODE_FOR_xop_pcmov_v32qi256 = 3745,
  CODE_FOR_xop_pcmov_v16qi = 3746,
  CODE_FOR_xop_pcmov_v16hi256 = 3747,
  CODE_FOR_xop_pcmov_v8hi = 3748,
  CODE_FOR_xop_pcmov_v16si512 = 3749,
  CODE_FOR_xop_pcmov_v8si256 = 3750,
  CODE_FOR_xop_pcmov_v4si = 3751,
  CODE_FOR_xop_pcmov_v8di512 = 3752,
  CODE_FOR_xop_pcmov_v4di256 = 3753,
  CODE_FOR_xop_pcmov_v2di = 3754,
  CODE_FOR_xop_pcmov_v16sf512 = 3755,
  CODE_FOR_xop_pcmov_v8sf256 = 3756,
  CODE_FOR_xop_pcmov_v4sf = 3757,
  CODE_FOR_xop_pcmov_v8df512 = 3758,
  CODE_FOR_xop_pcmov_v4df256 = 3759,
  CODE_FOR_xop_pcmov_v2df = 3760,
  CODE_FOR_xop_phaddbw = 3761,
  CODE_FOR_xop_phaddubw = 3762,
  CODE_FOR_xop_phaddbd = 3763,
  CODE_FOR_xop_phaddubd = 3764,
  CODE_FOR_xop_phaddbq = 3765,
  CODE_FOR_xop_phaddubq = 3766,
  CODE_FOR_xop_phaddwd = 3767,
  CODE_FOR_xop_phadduwd = 3768,
  CODE_FOR_xop_phaddwq = 3769,
  CODE_FOR_xop_phadduwq = 3770,
  CODE_FOR_xop_phadddq = 3771,
  CODE_FOR_xop_phaddudq = 3772,
  CODE_FOR_xop_phsubbw = 3773,
  CODE_FOR_xop_phsubwd = 3774,
  CODE_FOR_xop_phsubdq = 3775,
  CODE_FOR_xop_pperm = 3776,
  CODE_FOR_xop_pperm_pack_v2di_v4si = 3777,
  CODE_FOR_xop_pperm_pack_v4si_v8hi = 3778,
  CODE_FOR_xop_pperm_pack_v8hi_v16qi = 3779,
  CODE_FOR_xop_rotlv16qi3 = 3780,
  CODE_FOR_xop_rotlv8hi3 = 3781,
  CODE_FOR_xop_rotlv4si3 = 3782,
  CODE_FOR_xop_rotlv2di3 = 3783,
  CODE_FOR_xop_rotrv16qi3 = 3784,
  CODE_FOR_xop_rotrv8hi3 = 3785,
  CODE_FOR_xop_rotrv4si3 = 3786,
  CODE_FOR_xop_rotrv2di3 = 3787,
  CODE_FOR_xop_vrotlv16qi3 = 3788,
  CODE_FOR_xop_vrotlv8hi3 = 3789,
  CODE_FOR_xop_vrotlv4si3 = 3790,
  CODE_FOR_xop_vrotlv2di3 = 3791,
  CODE_FOR_xop_shav16qi3 = 3792,
  CODE_FOR_xop_shav8hi3 = 3793,
  CODE_FOR_xop_shav4si3 = 3794,
  CODE_FOR_xop_shav2di3 = 3795,
  CODE_FOR_xop_shlv16qi3 = 3796,
  CODE_FOR_xop_shlv8hi3 = 3797,
  CODE_FOR_xop_shlv4si3 = 3798,
  CODE_FOR_xop_shlv2di3 = 3799,
  CODE_FOR_xop_frczsf2 = 3800,
  CODE_FOR_xop_frczdf2 = 3801,
  CODE_FOR_xop_frczv4sf2 = 3802,
  CODE_FOR_xop_frczv2df2 = 3803,
  CODE_FOR_xop_frczv8sf2 = 3804,
  CODE_FOR_xop_frczv4df2 = 3805,
  CODE_FOR_xop_maskcmpv16qi3 = 3808,
  CODE_FOR_xop_maskcmpv8hi3 = 3809,
  CODE_FOR_xop_maskcmpv4si3 = 3810,
  CODE_FOR_xop_maskcmpv2di3 = 3811,
  CODE_FOR_xop_maskcmp_unsv16qi3 = 3812,
  CODE_FOR_xop_maskcmp_unsv8hi3 = 3813,
  CODE_FOR_xop_maskcmp_unsv4si3 = 3814,
  CODE_FOR_xop_maskcmp_unsv2di3 = 3815,
  CODE_FOR_xop_maskcmp_uns2v16qi3 = 3816,
  CODE_FOR_xop_maskcmp_uns2v8hi3 = 3817,
  CODE_FOR_xop_maskcmp_uns2v4si3 = 3818,
  CODE_FOR_xop_maskcmp_uns2v2di3 = 3819,
  CODE_FOR_xop_pcom_tfv16qi3 = 3820,
  CODE_FOR_xop_pcom_tfv8hi3 = 3821,
  CODE_FOR_xop_pcom_tfv4si3 = 3822,
  CODE_FOR_xop_pcom_tfv2di3 = 3823,
  CODE_FOR_xop_vpermil2v8sf3 = 3824,
  CODE_FOR_xop_vpermil2v4sf3 = 3825,
  CODE_FOR_xop_vpermil2v4df3 = 3826,
  CODE_FOR_xop_vpermil2v2df3 = 3827,
  CODE_FOR_aesenc = 3828,
  CODE_FOR_aesenclast = 3829,
  CODE_FOR_aesdec = 3830,
  CODE_FOR_aesdeclast = 3831,
  CODE_FOR_aesimc = 3832,
  CODE_FOR_aeskeygenassist = 3833,
  CODE_FOR_pclmulqdq = 3834,
  CODE_FOR_avx_vzeroupper = 3836,
  CODE_FOR_avx2_pbroadcastv16si = 3837,
  CODE_FOR_avx2_pbroadcastv8di = 3838,
  CODE_FOR_avx2_pbroadcastv64qi = 3839,
  CODE_FOR_avx2_pbroadcastv32qi = 3840,
  CODE_FOR_avx2_pbroadcastv16qi = 3841,
  CODE_FOR_avx2_pbroadcastv32hi = 3842,
  CODE_FOR_avx2_pbroadcastv16hi = 3843,
  CODE_FOR_avx2_pbroadcastv8hi = 3844,
  CODE_FOR_avx2_pbroadcastv8si = 3845,
  CODE_FOR_avx2_pbroadcastv4si = 3846,
  CODE_FOR_avx2_pbroadcastv4di = 3847,
  CODE_FOR_avx2_pbroadcastv2di = 3848,
  CODE_FOR_avx2_pbroadcastv32qi_1 = 3849,
  CODE_FOR_avx2_pbroadcastv16hi_1 = 3850,
  CODE_FOR_avx2_pbroadcastv8si_1 = 3851,
  CODE_FOR_avx2_pbroadcastv4di_1 = 3852,
  CODE_FOR_avx2_permvarv8si = 3853,
  CODE_FOR_avx2_permvarv8si_mask = 3854,
  CODE_FOR_avx2_permvarv8sf = 3855,
  CODE_FOR_avx2_permvarv8sf_mask = 3856,
  CODE_FOR_avx512f_permvarv16si = 3857,
  CODE_FOR_avx512f_permvarv16si_mask = 3858,
  CODE_FOR_avx512f_permvarv16sf = 3859,
  CODE_FOR_avx512f_permvarv16sf_mask = 3860,
  CODE_FOR_avx512f_permvarv8di = 3861,
  CODE_FOR_avx512f_permvarv8di_mask = 3862,
  CODE_FOR_avx512f_permvarv8df = 3863,
  CODE_FOR_avx512f_permvarv8df_mask = 3864,
  CODE_FOR_avx2_permvarv4di = 3865,
  CODE_FOR_avx2_permvarv4di_mask = 3866,
  CODE_FOR_avx2_permvarv4df = 3867,
  CODE_FOR_avx2_permvarv4df_mask = 3868,
  CODE_FOR_avx512bw_permvarv64qi = 3869,
  CODE_FOR_avx512bw_permvarv64qi_mask = 3870,
  CODE_FOR_avx512vl_permvarv16qi = 3871,
  CODE_FOR_avx512vl_permvarv16qi_mask = 3872,
  CODE_FOR_avx512vl_permvarv32qi = 3873,
  CODE_FOR_avx512vl_permvarv32qi_mask = 3874,
  CODE_FOR_avx512vl_permvarv8hi = 3875,
  CODE_FOR_avx512vl_permvarv8hi_mask = 3876,
  CODE_FOR_avx512vl_permvarv16hi = 3877,
  CODE_FOR_avx512vl_permvarv16hi_mask = 3878,
  CODE_FOR_avx512bw_permvarv32hi = 3879,
  CODE_FOR_avx512bw_permvarv32hi_mask = 3880,
  CODE_FOR_avx2_permv4di_1 = 3881,
  CODE_FOR_avx2_permv4di_1_mask = 3882,
  CODE_FOR_avx2_permv4df_1 = 3883,
  CODE_FOR_avx2_permv4df_1_mask = 3884,
  CODE_FOR_avx512f_permv8di_1 = 3885,
  CODE_FOR_avx512f_permv8di_1_mask = 3886,
  CODE_FOR_avx512f_permv8df_1 = 3887,
  CODE_FOR_avx512f_permv8df_1_mask = 3888,
  CODE_FOR_avx2_permv2ti = 3889,
  CODE_FOR_avx2_vec_dupv4df = 3890,
  CODE_FOR_avx512f_vec_dupv16si_1 = 3891,
  CODE_FOR_avx512f_vec_dupv8di_1 = 3892,
  CODE_FOR_avx512bw_vec_dupv32hi_1 = 3893,
  CODE_FOR_avx512bw_vec_dupv64qi_1 = 3894,
  CODE_FOR_avx512f_vec_dupv16si = 3895,
  CODE_FOR_avx512f_vec_dupv16si_mask = 3896,
  CODE_FOR_avx512vl_vec_dupv8si = 3897,
  CODE_FOR_avx512vl_vec_dupv8si_mask = 3898,
  CODE_FOR_avx512vl_vec_dupv4si = 3899,
  CODE_FOR_avx512vl_vec_dupv4si_mask = 3900,
  CODE_FOR_avx512f_vec_dupv8di = 3901,
  CODE_FOR_avx512f_vec_dupv8di_mask = 3902,
  CODE_FOR_avx512vl_vec_dupv4di = 3903,
  CODE_FOR_avx512vl_vec_dupv4di_mask = 3904,
  CODE_FOR_avx512vl_vec_dupv2di = 3905,
  CODE_FOR_avx512vl_vec_dupv2di_mask = 3906,
  CODE_FOR_avx512f_vec_dupv16sf = 3907,
  CODE_FOR_avx512f_vec_dupv16sf_mask = 3908,
  CODE_FOR_avx512vl_vec_dupv8sf = 3909,
  CODE_FOR_avx512vl_vec_dupv8sf_mask = 3910,
  CODE_FOR_avx512vl_vec_dupv4sf = 3911,
  CODE_FOR_avx512vl_vec_dupv4sf_mask = 3912,
  CODE_FOR_avx512f_vec_dupv8df = 3913,
  CODE_FOR_avx512f_vec_dupv8df_mask = 3914,
  CODE_FOR_avx512vl_vec_dupv4df = 3915,
  CODE_FOR_avx512vl_vec_dupv4df_mask = 3916,
  CODE_FOR_avx512vl_vec_dupv2df = 3917,
  CODE_FOR_avx512vl_vec_dupv2df_mask = 3918,
  CODE_FOR_avx512bw_vec_dupv64qi = 3919,
  CODE_FOR_avx512bw_vec_dupv64qi_mask = 3920,
  CODE_FOR_avx512vl_vec_dupv16qi = 3921,
  CODE_FOR_avx512vl_vec_dupv16qi_mask = 3922,
  CODE_FOR_avx512vl_vec_dupv32qi = 3923,
  CODE_FOR_avx512vl_vec_dupv32qi_mask = 3924,
  CODE_FOR_avx512bw_vec_dupv32hi = 3925,
  CODE_FOR_avx512bw_vec_dupv32hi_mask = 3926,
  CODE_FOR_avx512vl_vec_dupv16hi = 3927,
  CODE_FOR_avx512vl_vec_dupv16hi_mask = 3928,
  CODE_FOR_avx512vl_vec_dupv8hi = 3929,
  CODE_FOR_avx512vl_vec_dupv8hi_mask = 3930,
  CODE_FOR_avx512f_broadcastv16sf_mask = 3932,
  CODE_FOR_avx512f_broadcastv16si_mask = 3934,
  CODE_FOR_avx512f_broadcastv8df_mask = 3936,
  CODE_FOR_avx512f_broadcastv8di_mask = 3938,
  CODE_FOR_avx512bw_vec_dup_gprv64qi_mask = 3940,
  CODE_FOR_avx512vl_vec_dup_gprv16qi_mask = 3942,
  CODE_FOR_avx512vl_vec_dup_gprv32qi_mask = 3944,
  CODE_FOR_avx512bw_vec_dup_gprv32hi_mask = 3946,
  CODE_FOR_avx512vl_vec_dup_gprv16hi_mask = 3948,
  CODE_FOR_avx512vl_vec_dup_gprv8hi_mask = 3950,
  CODE_FOR_avx512f_vec_dup_gprv16si_mask = 3952,
  CODE_FOR_avx512vl_vec_dup_gprv8si_mask = 3954,
  CODE_FOR_avx512vl_vec_dup_gprv4si_mask = 3956,
  CODE_FOR_avx512f_vec_dup_gprv8di_mask = 3958,
  CODE_FOR_avx512vl_vec_dup_gprv4di_mask = 3960,
  CODE_FOR_avx512vl_vec_dup_gprv2di_mask = 3962,
  CODE_FOR_avx512f_vec_dup_gprv16sf_mask = 3964,
  CODE_FOR_avx512vl_vec_dup_gprv8sf_mask = 3966,
  CODE_FOR_avx512vl_vec_dup_gprv4sf_mask = 3968,
  CODE_FOR_avx512f_vec_dup_gprv8df_mask = 3970,
  CODE_FOR_avx512vl_vec_dup_gprv4df_mask = 3972,
  CODE_FOR_avx512vl_vec_dup_gprv2df_mask = 3974,
  CODE_FOR_vec_dupv4sf = 3975,
  CODE_FOR_avx2_vbroadcasti128_v32qi = 3978,
  CODE_FOR_avx2_vbroadcasti128_v16hi = 3979,
  CODE_FOR_avx2_vbroadcasti128_v8si = 3980,
  CODE_FOR_avx2_vbroadcasti128_v4di = 3981,
  CODE_FOR_vec_dupv8si = 3988,
  CODE_FOR_vec_dupv8sf = 3989,
  CODE_FOR_vec_dupv4di = 3990,
  CODE_FOR_vec_dupv4df = 3991,
  CODE_FOR_avx_vbroadcastf128_v32qi = 3992,
  CODE_FOR_avx_vbroadcastf128_v16hi = 3993,
  CODE_FOR_avx_vbroadcastf128_v8si = 3994,
  CODE_FOR_avx_vbroadcastf128_v4di = 3995,
  CODE_FOR_avx_vbroadcastf128_v8sf = 3996,
  CODE_FOR_avx_vbroadcastf128_v4df = 3997,
  CODE_FOR_avx512dq_broadcastv16si_mask = 3999,
  CODE_FOR_avx512dq_broadcastv8si_mask = 4001,
  CODE_FOR_avx512dq_broadcastv4si_mask = 4003,
  CODE_FOR_avx512dq_broadcastv16sf_mask = 4005,
  CODE_FOR_avx512dq_broadcastv8sf_mask = 4007,
  CODE_FOR_avx512vl_broadcastv8si_mask_1 = 4009,
  CODE_FOR_avx512vl_broadcastv8sf_mask_1 = 4011,
  CODE_FOR_avx512dq_broadcastv16sf_mask_1 = 4013,
  CODE_FOR_avx512dq_broadcastv16si_mask_1 = 4015,
  CODE_FOR_avx512dq_broadcastv8di_mask_1 = 4017,
  CODE_FOR_avx512dq_broadcastv8df_mask_1 = 4019,
  CODE_FOR_avx512dq_broadcastv4di_mask_1 = 4021,
  CODE_FOR_avx512dq_broadcastv4df_mask_1 = 4023,
  CODE_FOR_avx512cd_maskb_vec_dupv8di = 4024,
  CODE_FOR_avx512cd_maskb_vec_dupv4di = 4025,
  CODE_FOR_avx512cd_maskb_vec_dupv2di = 4026,
  CODE_FOR_avx512cd_maskw_vec_dupv16si = 4027,
  CODE_FOR_avx512cd_maskw_vec_dupv8si = 4028,
  CODE_FOR_avx512cd_maskw_vec_dupv4si = 4029,
  CODE_FOR_avx512f_vpermilvarv16sf3 = 4045,
  CODE_FOR_avx512f_vpermilvarv16sf3_mask = 4046,
  CODE_FOR_avx_vpermilvarv8sf3 = 4047,
  CODE_FOR_avx_vpermilvarv8sf3_mask = 4048,
  CODE_FOR_avx_vpermilvarv4sf3 = 4049,
  CODE_FOR_avx_vpermilvarv4sf3_mask = 4050,
  CODE_FOR_avx512f_vpermilvarv8df3 = 4051,
  CODE_FOR_avx512f_vpermilvarv8df3_mask = 4052,
  CODE_FOR_avx_vpermilvarv4df3 = 4053,
  CODE_FOR_avx_vpermilvarv4df3_mask = 4054,
  CODE_FOR_avx_vpermilvarv2df3 = 4055,
  CODE_FOR_avx_vpermilvarv2df3_mask = 4056,
  CODE_FOR_avx512f_vpermi2varv16si3 = 4057,
  CODE_FOR_avx512f_vpermi2varv16si3_maskz_1 = 4058,
  CODE_FOR_avx512f_vpermi2varv16sf3 = 4059,
  CODE_FOR_avx512f_vpermi2varv16sf3_maskz_1 = 4060,
  CODE_FOR_avx512f_vpermi2varv8di3 = 4061,
  CODE_FOR_avx512f_vpermi2varv8di3_maskz_1 = 4062,
  CODE_FOR_avx512f_vpermi2varv8df3 = 4063,
  CODE_FOR_avx512f_vpermi2varv8df3_maskz_1 = 4064,
  CODE_FOR_avx512vl_vpermi2varv8si3 = 4065,
  CODE_FOR_avx512vl_vpermi2varv8si3_maskz_1 = 4066,
  CODE_FOR_avx512vl_vpermi2varv8sf3 = 4067,
  CODE_FOR_avx512vl_vpermi2varv8sf3_maskz_1 = 4068,
  CODE_FOR_avx512vl_vpermi2varv4di3 = 4069,
  CODE_FOR_avx512vl_vpermi2varv4di3_maskz_1 = 4070,
  CODE_FOR_avx512vl_vpermi2varv4df3 = 4071,
  CODE_FOR_avx512vl_vpermi2varv4df3_maskz_1 = 4072,
  CODE_FOR_avx512vl_vpermi2varv4si3 = 4073,
  CODE_FOR_avx512vl_vpermi2varv4si3_maskz_1 = 4074,
  CODE_FOR_avx512vl_vpermi2varv4sf3 = 4075,
  CODE_FOR_avx512vl_vpermi2varv4sf3_maskz_1 = 4076,
  CODE_FOR_avx512vl_vpermi2varv2di3 = 4077,
  CODE_FOR_avx512vl_vpermi2varv2di3_maskz_1 = 4078,
  CODE_FOR_avx512vl_vpermi2varv2df3 = 4079,
  CODE_FOR_avx512vl_vpermi2varv2df3_maskz_1 = 4080,
  CODE_FOR_avx512bw_vpermi2varv64qi3 = 4081,
  CODE_FOR_avx512bw_vpermi2varv64qi3_maskz_1 = 4082,
  CODE_FOR_avx512vl_vpermi2varv16qi3 = 4083,
  CODE_FOR_avx512vl_vpermi2varv16qi3_maskz_1 = 4084,
  CODE_FOR_avx512vl_vpermi2varv32qi3 = 4085,
  CODE_FOR_avx512vl_vpermi2varv32qi3_maskz_1 = 4086,
  CODE_FOR_avx512vl_vpermi2varv8hi3 = 4087,
  CODE_FOR_avx512vl_vpermi2varv8hi3_maskz_1 = 4088,
  CODE_FOR_avx512vl_vpermi2varv16hi3 = 4089,
  CODE_FOR_avx512vl_vpermi2varv16hi3_maskz_1 = 4090,
  CODE_FOR_avx512bw_vpermi2varv32hi3 = 4091,
  CODE_FOR_avx512bw_vpermi2varv32hi3_maskz_1 = 4092,
  CODE_FOR_avx512f_vpermi2varv16si3_mask = 4093,
  CODE_FOR_avx512f_vpermi2varv16sf3_mask = 4094,
  CODE_FOR_avx512f_vpermi2varv8di3_mask = 4095,
  CODE_FOR_avx512f_vpermi2varv8df3_mask = 4096,
  CODE_FOR_avx512vl_vpermi2varv8si3_mask = 4097,
  CODE_FOR_avx512vl_vpermi2varv8sf3_mask = 4098,
  CODE_FOR_avx512vl_vpermi2varv4di3_mask = 4099,
  CODE_FOR_avx512vl_vpermi2varv4df3_mask = 4100,
  CODE_FOR_avx512vl_vpermi2varv4si3_mask = 4101,
  CODE_FOR_avx512vl_vpermi2varv4sf3_mask = 4102,
  CODE_FOR_avx512vl_vpermi2varv2di3_mask = 4103,
  CODE_FOR_avx512vl_vpermi2varv2df3_mask = 4104,
  CODE_FOR_avx512bw_vpermi2varv64qi3_mask = 4105,
  CODE_FOR_avx512vl_vpermi2varv16qi3_mask = 4106,
  CODE_FOR_avx512vl_vpermi2varv32qi3_mask = 4107,
  CODE_FOR_avx512vl_vpermi2varv8hi3_mask = 4108,
  CODE_FOR_avx512vl_vpermi2varv16hi3_mask = 4109,
  CODE_FOR_avx512bw_vpermi2varv32hi3_mask = 4110,
  CODE_FOR_avx512f_vpermt2varv16si3 = 4111,
  CODE_FOR_avx512f_vpermt2varv16si3_maskz_1 = 4112,
  CODE_FOR_avx512f_vpermt2varv16sf3 = 4113,
  CODE_FOR_avx512f_vpermt2varv16sf3_maskz_1 = 4114,
  CODE_FOR_avx512f_vpermt2varv8di3 = 4115,
  CODE_FOR_avx512f_vpermt2varv8di3_maskz_1 = 4116,
  CODE_FOR_avx512f_vpermt2varv8df3 = 4117,
  CODE_FOR_avx512f_vpermt2varv8df3_maskz_1 = 4118,
  CODE_FOR_avx512vl_vpermt2varv8si3 = 4119,
  CODE_FOR_avx512vl_vpermt2varv8si3_maskz_1 = 4120,
  CODE_FOR_avx512vl_vpermt2varv8sf3 = 4121,
  CODE_FOR_avx512vl_vpermt2varv8sf3_maskz_1 = 4122,
  CODE_FOR_avx512vl_vpermt2varv4di3 = 4123,
  CODE_FOR_avx512vl_vpermt2varv4di3_maskz_1 = 4124,
  CODE_FOR_avx512vl_vpermt2varv4df3 = 4125,
  CODE_FOR_avx512vl_vpermt2varv4df3_maskz_1 = 4126,
  CODE_FOR_avx512vl_vpermt2varv4si3 = 4127,
  CODE_FOR_avx512vl_vpermt2varv4si3_maskz_1 = 4128,
  CODE_FOR_avx512vl_vpermt2varv4sf3 = 4129,
  CODE_FOR_avx512vl_vpermt2varv4sf3_maskz_1 = 4130,
  CODE_FOR_avx512vl_vpermt2varv2di3 = 4131,
  CODE_FOR_avx512vl_vpermt2varv2di3_maskz_1 = 4132,
  CODE_FOR_avx512vl_vpermt2varv2df3 = 4133,
  CODE_FOR_avx512vl_vpermt2varv2df3_maskz_1 = 4134,
  CODE_FOR_avx512bw_vpermt2varv64qi3 = 4135,
  CODE_FOR_avx512bw_vpermt2varv64qi3_maskz_1 = 4136,
  CODE_FOR_avx512vl_vpermt2varv16qi3 = 4137,
  CODE_FOR_avx512vl_vpermt2varv16qi3_maskz_1 = 4138,
  CODE_FOR_avx512vl_vpermt2varv32qi3 = 4139,
  CODE_FOR_avx512vl_vpermt2varv32qi3_maskz_1 = 4140,
  CODE_FOR_avx512vl_vpermt2varv8hi3 = 4141,
  CODE_FOR_avx512vl_vpermt2varv8hi3_maskz_1 = 4142,
  CODE_FOR_avx512vl_vpermt2varv16hi3 = 4143,
  CODE_FOR_avx512vl_vpermt2varv16hi3_maskz_1 = 4144,
  CODE_FOR_avx512bw_vpermt2varv32hi3 = 4145,
  CODE_FOR_avx512bw_vpermt2varv32hi3_maskz_1 = 4146,
  CODE_FOR_avx512f_vpermt2varv16si3_mask = 4147,
  CODE_FOR_avx512f_vpermt2varv16sf3_mask = 4148,
  CODE_FOR_avx512f_vpermt2varv8di3_mask = 4149,
  CODE_FOR_avx512f_vpermt2varv8df3_mask = 4150,
  CODE_FOR_avx512vl_vpermt2varv8si3_mask = 4151,
  CODE_FOR_avx512vl_vpermt2varv8sf3_mask = 4152,
  CODE_FOR_avx512vl_vpermt2varv4di3_mask = 4153,
  CODE_FOR_avx512vl_vpermt2varv4df3_mask = 4154,
  CODE_FOR_avx512vl_vpermt2varv4si3_mask = 4155,
  CODE_FOR_avx512vl_vpermt2varv4sf3_mask = 4156,
  CODE_FOR_avx512vl_vpermt2varv2di3_mask = 4157,
  CODE_FOR_avx512vl_vpermt2varv2df3_mask = 4158,
  CODE_FOR_avx512bw_vpermt2varv64qi3_mask = 4159,
  CODE_FOR_avx512vl_vpermt2varv16qi3_mask = 4160,
  CODE_FOR_avx512vl_vpermt2varv32qi3_mask = 4161,
  CODE_FOR_avx512vl_vpermt2varv8hi3_mask = 4162,
  CODE_FOR_avx512vl_vpermt2varv16hi3_mask = 4163,
  CODE_FOR_avx512bw_vpermt2varv32hi3_mask = 4164,
  CODE_FOR_vec_set_lo_v4di = 4177,
  CODE_FOR_vec_set_lo_v4di_mask = 4178,
  CODE_FOR_vec_set_lo_v4df = 4179,
  CODE_FOR_vec_set_lo_v4df_mask = 4180,
  CODE_FOR_vec_set_hi_v4di = 4181,
  CODE_FOR_vec_set_hi_v4di_mask = 4182,
  CODE_FOR_vec_set_hi_v4df = 4183,
  CODE_FOR_vec_set_hi_v4df_mask = 4184,
  CODE_FOR_vec_set_lo_v8si = 4185,
  CODE_FOR_vec_set_lo_v8si_mask = 4186,
  CODE_FOR_vec_set_lo_v8sf = 4187,
  CODE_FOR_vec_set_lo_v8sf_mask = 4188,
  CODE_FOR_vec_set_hi_v8si = 4189,
  CODE_FOR_vec_set_hi_v8si_mask = 4190,
  CODE_FOR_vec_set_hi_v8sf = 4191,
  CODE_FOR_vec_set_hi_v8sf_mask = 4192,
  CODE_FOR_vec_set_lo_v16hi = 4193,
  CODE_FOR_vec_set_hi_v16hi = 4194,
  CODE_FOR_vec_set_lo_v32qi = 4195,
  CODE_FOR_vec_set_hi_v32qi = 4196,
  CODE_FOR_avx_maskloadps = 4197,
  CODE_FOR_avx_maskloadpd = 4198,
  CODE_FOR_avx_maskloadps256 = 4199,
  CODE_FOR_avx_maskloadpd256 = 4200,
  CODE_FOR_avx2_maskloadd = 4201,
  CODE_FOR_avx2_maskloadq = 4202,
  CODE_FOR_avx2_maskloadd256 = 4203,
  CODE_FOR_avx2_maskloadq256 = 4204,
  CODE_FOR_avx_maskstoreps = 4205,
  CODE_FOR_avx_maskstorepd = 4206,
  CODE_FOR_avx_maskstoreps256 = 4207,
  CODE_FOR_avx_maskstorepd256 = 4208,
  CODE_FOR_avx2_maskstored = 4209,
  CODE_FOR_avx2_maskstoreq = 4210,
  CODE_FOR_avx2_maskstored256 = 4211,
  CODE_FOR_avx2_maskstoreq256 = 4212,
  CODE_FOR_avx_si256_si = 4213,
  CODE_FOR_avx_ps256_ps = 4214,
  CODE_FOR_avx_pd256_pd = 4215,
  CODE_FOR_avx2_ashrvv4si = 4216,
  CODE_FOR_avx2_ashrvv4si_mask = 4217,
  CODE_FOR_avx2_ashrvv8si = 4218,
  CODE_FOR_avx2_ashrvv8si_mask = 4219,
  CODE_FOR_avx512f_ashrvv16si = 4220,
  CODE_FOR_avx512f_ashrvv16si_mask = 4221,
  CODE_FOR_avx2_ashrvv2di = 4222,
  CODE_FOR_avx2_ashrvv2di_mask = 4223,
  CODE_FOR_avx2_ashrvv4di = 4224,
  CODE_FOR_avx2_ashrvv4di_mask = 4225,
  CODE_FOR_avx512f_ashrvv8di = 4226,
  CODE_FOR_avx512f_ashrvv8di_mask = 4227,
  CODE_FOR_avx512vl_ashrvv8hi = 4228,
  CODE_FOR_avx512vl_ashrvv8hi_mask = 4229,
  CODE_FOR_avx512vl_ashrvv16hi = 4230,
  CODE_FOR_avx512vl_ashrvv16hi_mask = 4231,
  CODE_FOR_avx512bw_ashrvv32hi = 4232,
  CODE_FOR_avx512bw_ashrvv32hi_mask = 4233,
  CODE_FOR_avx512f_ashlvv16si = 4234,
  CODE_FOR_avx512f_ashlvv16si_mask = 4235,
  CODE_FOR_avx512f_lshrvv16si = 4236,
  CODE_FOR_avx512f_lshrvv16si_mask = 4237,
  CODE_FOR_avx2_ashlvv8si = 4238,
  CODE_FOR_avx2_ashlvv8si_mask = 4239,
  CODE_FOR_avx2_lshrvv8si = 4240,
  CODE_FOR_avx2_lshrvv8si_mask = 4241,
  CODE_FOR_avx2_ashlvv4si = 4242,
  CODE_FOR_avx2_ashlvv4si_mask = 4243,
  CODE_FOR_avx2_lshrvv4si = 4244,
  CODE_FOR_avx2_lshrvv4si_mask = 4245,
  CODE_FOR_avx512f_ashlvv8di = 4246,
  CODE_FOR_avx512f_ashlvv8di_mask = 4247,
  CODE_FOR_avx512f_lshrvv8di = 4248,
  CODE_FOR_avx512f_lshrvv8di_mask = 4249,
  CODE_FOR_avx2_ashlvv4di = 4250,
  CODE_FOR_avx2_ashlvv4di_mask = 4251,
  CODE_FOR_avx2_lshrvv4di = 4252,
  CODE_FOR_avx2_lshrvv4di_mask = 4253,
  CODE_FOR_avx2_ashlvv2di = 4254,
  CODE_FOR_avx2_ashlvv2di_mask = 4255,
  CODE_FOR_avx2_lshrvv2di = 4256,
  CODE_FOR_avx2_lshrvv2di_mask = 4257,
  CODE_FOR_avx512vl_ashlvv8hi = 4258,
  CODE_FOR_avx512vl_ashlvv8hi_mask = 4259,
  CODE_FOR_avx512vl_lshrvv8hi = 4260,
  CODE_FOR_avx512vl_lshrvv8hi_mask = 4261,
  CODE_FOR_avx512vl_ashlvv16hi = 4262,
  CODE_FOR_avx512vl_ashlvv16hi_mask = 4263,
  CODE_FOR_avx512vl_lshrvv16hi = 4264,
  CODE_FOR_avx512vl_lshrvv16hi_mask = 4265,
  CODE_FOR_avx512bw_ashlvv32hi = 4266,
  CODE_FOR_avx512bw_ashlvv32hi_mask = 4267,
  CODE_FOR_avx512bw_lshrvv32hi = 4268,
  CODE_FOR_avx512bw_lshrvv32hi_mask = 4269,
  CODE_FOR_avx_vec_concatv32qi = 4270,
  CODE_FOR_avx_vec_concatv16hi = 4271,
  CODE_FOR_avx_vec_concatv8si = 4272,
  CODE_FOR_avx_vec_concatv4di = 4273,
  CODE_FOR_avx_vec_concatv8sf = 4274,
  CODE_FOR_avx_vec_concatv4df = 4275,
  CODE_FOR_avx_vec_concatv64qi = 4276,
  CODE_FOR_avx_vec_concatv32hi = 4277,
  CODE_FOR_avx_vec_concatv16si = 4278,
  CODE_FOR_avx_vec_concatv8di = 4279,
  CODE_FOR_avx_vec_concatv16sf = 4280,
  CODE_FOR_avx_vec_concatv8df = 4281,
  CODE_FOR_vcvtph2ps = 4282,
  CODE_FOR_vcvtph2ps_mask = 4283,
  CODE_FOR_vcvtph2ps256 = 4286,
  CODE_FOR_vcvtph2ps256_mask = 4287,
  CODE_FOR_avx512f_vcvtph2ps512_mask = 4290,
  CODE_FOR_avx512f_vcvtph2ps512_mask_round = 4291,
  CODE_FOR_vcvtps2ph256 = 4295,
  CODE_FOR_vcvtps2ph256_mask = 4296,
  CODE_FOR_avx512f_vcvtps2ph512_mask = 4298,
  CODE_FOR_avx512f_compressv16si_mask = 4515,
  CODE_FOR_avx512f_compressv16sf_mask = 4516,
  CODE_FOR_avx512f_compressv8di_mask = 4517,
  CODE_FOR_avx512f_compressv8df_mask = 4518,
  CODE_FOR_avx512vl_compressv8si_mask = 4519,
  CODE_FOR_avx512vl_compressv8sf_mask = 4520,
  CODE_FOR_avx512vl_compressv4di_mask = 4521,
  CODE_FOR_avx512vl_compressv4df_mask = 4522,
  CODE_FOR_avx512vl_compressv4si_mask = 4523,
  CODE_FOR_avx512vl_compressv4sf_mask = 4524,
  CODE_FOR_avx512vl_compressv2di_mask = 4525,
  CODE_FOR_avx512vl_compressv2df_mask = 4526,
  CODE_FOR_avx512f_compressstorev16si_mask = 4527,
  CODE_FOR_avx512f_compressstorev16sf_mask = 4528,
  CODE_FOR_avx512f_compressstorev8di_mask = 4529,
  CODE_FOR_avx512f_compressstorev8df_mask = 4530,
  CODE_FOR_avx512vl_compressstorev8si_mask = 4531,
  CODE_FOR_avx512vl_compressstorev8sf_mask = 4532,
  CODE_FOR_avx512vl_compressstorev4di_mask = 4533,
  CODE_FOR_avx512vl_compressstorev4df_mask = 4534,
  CODE_FOR_avx512vl_compressstorev4si_mask = 4535,
  CODE_FOR_avx512vl_compressstorev4sf_mask = 4536,
  CODE_FOR_avx512vl_compressstorev2di_mask = 4537,
  CODE_FOR_avx512vl_compressstorev2df_mask = 4538,
  CODE_FOR_avx512f_expandv16si_mask = 4539,
  CODE_FOR_avx512f_expandv16sf_mask = 4540,
  CODE_FOR_avx512f_expandv8di_mask = 4541,
  CODE_FOR_avx512f_expandv8df_mask = 4542,
  CODE_FOR_avx512vl_expandv8si_mask = 4543,
  CODE_FOR_avx512vl_expandv8sf_mask = 4544,
  CODE_FOR_avx512vl_expandv4di_mask = 4545,
  CODE_FOR_avx512vl_expandv4df_mask = 4546,
  CODE_FOR_avx512vl_expandv4si_mask = 4547,
  CODE_FOR_avx512vl_expandv4sf_mask = 4548,
  CODE_FOR_avx512vl_expandv2di_mask = 4549,
  CODE_FOR_avx512vl_expandv2df_mask = 4550,
  CODE_FOR_avx512dq_rangepv16sf = 4551,
  CODE_FOR_avx512dq_rangepv16sf_round = 4552,
  CODE_FOR_avx512dq_rangepv16sf_mask = 4553,
  CODE_FOR_avx512dq_rangepv16sf_mask_round = 4554,
  CODE_FOR_avx512dq_rangepv8sf = 4555,
#define CODE_FOR_avx512dq_rangepv8sf_round CODE_FOR_nothing
  CODE_FOR_avx512dq_rangepv8sf_mask = 4556,
#define CODE_FOR_avx512dq_rangepv8sf_mask_round CODE_FOR_nothing
  CODE_FOR_avx512dq_rangepv4sf = 4557,
#define CODE_FOR_avx512dq_rangepv4sf_round CODE_FOR_nothing
  CODE_FOR_avx512dq_rangepv4sf_mask = 4558,
#define CODE_FOR_avx512dq_rangepv4sf_mask_round CODE_FOR_nothing
  CODE_FOR_avx512dq_rangepv8df = 4559,
  CODE_FOR_avx512dq_rangepv8df_round = 4560,
  CODE_FOR_avx512dq_rangepv8df_mask = 4561,
  CODE_FOR_avx512dq_rangepv8df_mask_round = 4562,
  CODE_FOR_avx512dq_rangepv4df = 4563,
#define CODE_FOR_avx512dq_rangepv4df_round CODE_FOR_nothing
  CODE_FOR_avx512dq_rangepv4df_mask = 4564,
#define CODE_FOR_avx512dq_rangepv4df_mask_round CODE_FOR_nothing
  CODE_FOR_avx512dq_rangepv2df = 4565,
#define CODE_FOR_avx512dq_rangepv2df_round CODE_FOR_nothing
  CODE_FOR_avx512dq_rangepv2df_mask = 4566,
#define CODE_FOR_avx512dq_rangepv2df_mask_round CODE_FOR_nothing
  CODE_FOR_avx512dq_rangesv4sf = 4567,
  CODE_FOR_avx512dq_rangesv4sf_round = 4568,
  CODE_FOR_avx512dq_rangesv2df = 4569,
  CODE_FOR_avx512dq_rangesv2df_round = 4570,
  CODE_FOR_avx512dq_fpclassv16sf = 4571,
  CODE_FOR_avx512dq_fpclassv16sf_mask = 4572,
  CODE_FOR_avx512dq_fpclassv8sf = 4573,
  CODE_FOR_avx512dq_fpclassv8sf_mask = 4574,
  CODE_FOR_avx512dq_fpclassv4sf = 4575,
  CODE_FOR_avx512dq_fpclassv4sf_mask = 4576,
  CODE_FOR_avx512dq_fpclassv8df = 4577,
  CODE_FOR_avx512dq_fpclassv8df_mask = 4578,
  CODE_FOR_avx512dq_fpclassv4df = 4579,
  CODE_FOR_avx512dq_fpclassv4df_mask = 4580,
  CODE_FOR_avx512dq_fpclassv2df = 4581,
  CODE_FOR_avx512dq_fpclassv2df_mask = 4582,
  CODE_FOR_avx512dq_vmfpclassv4sf = 4583,
  CODE_FOR_avx512dq_vmfpclassv2df = 4584,
  CODE_FOR_avx512f_getmantv16sf = 4585,
  CODE_FOR_avx512f_getmantv16sf_round = 4586,
  CODE_FOR_avx512f_getmantv16sf_mask = 4587,
  CODE_FOR_avx512f_getmantv16sf_mask_round = 4588,
  CODE_FOR_avx512vl_getmantv8sf = 4589,
  CODE_FOR_avx512vl_getmantv8sf_round = 4590,
  CODE_FOR_avx512vl_getmantv8sf_mask = 4591,
  CODE_FOR_avx512vl_getmantv8sf_mask_round = 4592,
  CODE_FOR_avx512vl_getmantv4sf = 4593,
  CODE_FOR_avx512vl_getmantv4sf_round = 4594,
  CODE_FOR_avx512vl_getmantv4sf_mask = 4595,
  CODE_FOR_avx512vl_getmantv4sf_mask_round = 4596,
  CODE_FOR_avx512f_getmantv8df = 4597,
  CODE_FOR_avx512f_getmantv8df_round = 4598,
  CODE_FOR_avx512f_getmantv8df_mask = 4599,
  CODE_FOR_avx512f_getmantv8df_mask_round = 4600,
  CODE_FOR_avx512vl_getmantv4df = 4601,
  CODE_FOR_avx512vl_getmantv4df_round = 4602,
  CODE_FOR_avx512vl_getmantv4df_mask = 4603,
  CODE_FOR_avx512vl_getmantv4df_mask_round = 4604,
  CODE_FOR_avx512vl_getmantv2df = 4605,
  CODE_FOR_avx512vl_getmantv2df_round = 4606,
  CODE_FOR_avx512vl_getmantv2df_mask = 4607,
  CODE_FOR_avx512vl_getmantv2df_mask_round = 4608,
  CODE_FOR_avx512f_vgetmantv4sf = 4609,
  CODE_FOR_avx512f_vgetmantv4sf_round = 4610,
  CODE_FOR_avx512f_vgetmantv2df = 4611,
  CODE_FOR_avx512f_vgetmantv2df_round = 4612,
  CODE_FOR_avx512bw_dbpsadbwv8hi_mask = 4614,
  CODE_FOR_avx512bw_dbpsadbwv16hi_mask = 4616,
  CODE_FOR_avx512bw_dbpsadbwv32hi_mask = 4618,
  CODE_FOR_clzv16si2 = 4619,
  CODE_FOR_clzv16si2_mask = 4620,
  CODE_FOR_clzv8si2 = 4621,
  CODE_FOR_clzv8si2_mask = 4622,
  CODE_FOR_clzv4si2 = 4623,
  CODE_FOR_clzv4si2_mask = 4624,
  CODE_FOR_clzv8di2 = 4625,
  CODE_FOR_clzv8di2_mask = 4626,
  CODE_FOR_clzv4di2 = 4627,
  CODE_FOR_clzv4di2_mask = 4628,
  CODE_FOR_clzv2di2 = 4629,
  CODE_FOR_clzv2di2_mask = 4630,
  CODE_FOR_conflictv16si_mask = 4632,
  CODE_FOR_conflictv8si_mask = 4634,
  CODE_FOR_conflictv4si_mask = 4636,
  CODE_FOR_conflictv8di_mask = 4638,
  CODE_FOR_conflictv4di_mask = 4640,
  CODE_FOR_conflictv2di_mask = 4642,
  CODE_FOR_sha1msg1 = 4643,
  CODE_FOR_sha1msg2 = 4644,
  CODE_FOR_sha1nexte = 4645,
  CODE_FOR_sha1rnds4 = 4646,
  CODE_FOR_sha256msg1 = 4647,
  CODE_FOR_sha256msg2 = 4648,
  CODE_FOR_sha256rnds2 = 4649,
  CODE_FOR_avx512f_si512_si = 4650,
  CODE_FOR_avx512f_ps512_ps = 4651,
  CODE_FOR_avx512f_pd512_pd = 4652,
  CODE_FOR_avx512f_si512_256si = 4653,
  CODE_FOR_avx512f_ps512_256ps = 4654,
  CODE_FOR_avx512f_pd512_256pd = 4655,
  CODE_FOR_vpamdd52luqv8di = 4656,
  CODE_FOR_vpamdd52luqv8di_maskz_1 = 4657,
  CODE_FOR_vpamdd52huqv8di = 4658,
  CODE_FOR_vpamdd52huqv8di_maskz_1 = 4659,
  CODE_FOR_vpamdd52luqv4di = 4660,
  CODE_FOR_vpamdd52luqv4di_maskz_1 = 4661,
  CODE_FOR_vpamdd52huqv4di = 4662,
  CODE_FOR_vpamdd52huqv4di_maskz_1 = 4663,
  CODE_FOR_vpamdd52luqv2di = 4664,
  CODE_FOR_vpamdd52luqv2di_maskz_1 = 4665,
  CODE_FOR_vpamdd52huqv2di = 4666,
  CODE_FOR_vpamdd52huqv2di_maskz_1 = 4667,
  CODE_FOR_vpamdd52luqv8di_mask = 4668,
  CODE_FOR_vpamdd52huqv8di_mask = 4669,
  CODE_FOR_vpamdd52luqv4di_mask = 4670,
  CODE_FOR_vpamdd52huqv4di_mask = 4671,
  CODE_FOR_vpamdd52luqv2di_mask = 4672,
  CODE_FOR_vpamdd52huqv2di_mask = 4673,
  CODE_FOR_vpmultishiftqbv64qi = 4674,
  CODE_FOR_vpmultishiftqbv64qi_mask = 4675,
  CODE_FOR_vpmultishiftqbv16qi = 4676,
  CODE_FOR_vpmultishiftqbv16qi_mask = 4677,
  CODE_FOR_vpmultishiftqbv32qi = 4678,
  CODE_FOR_vpmultishiftqbv32qi_mask = 4679,
  CODE_FOR_mfence_sse2 = 4682,
  CODE_FOR_mfence_nosse = 4683,
  CODE_FOR_atomic_loaddi_fpu = 4684,
  CODE_FOR_atomic_storeqi_1 = 4685,
  CODE_FOR_atomic_storehi_1 = 4686,
  CODE_FOR_atomic_storesi_1 = 4687,
#define CODE_FOR_atomic_storedi_1 CODE_FOR_nothing
  CODE_FOR_atomic_storedi_fpu = 4688,
  CODE_FOR_loaddi_via_fpu = 4689,
  CODE_FOR_storedi_via_fpu = 4690,
  CODE_FOR_atomic_compare_and_swapdi_doubleword = 4691,
#define CODE_FOR_atomic_compare_and_swapti_doubleword CODE_FOR_nothing
  CODE_FOR_atomic_compare_and_swapqi_1 = 4692,
  CODE_FOR_atomic_compare_and_swaphi_1 = 4693,
  CODE_FOR_atomic_compare_and_swapsi_1 = 4694,
#define CODE_FOR_atomic_compare_and_swapdi_1 CODE_FOR_nothing
  CODE_FOR_atomic_fetch_addqi = 4695,
  CODE_FOR_atomic_fetch_addhi = 4696,
  CODE_FOR_atomic_fetch_addsi = 4697,
#define CODE_FOR_atomic_fetch_adddi CODE_FOR_nothing
  CODE_FOR_atomic_exchangeqi = 4701,
  CODE_FOR_atomic_exchangehi = 4702,
  CODE_FOR_atomic_exchangesi = 4703,
#define CODE_FOR_atomic_exchangedi CODE_FOR_nothing
  CODE_FOR_atomic_addqi = 4704,
  CODE_FOR_atomic_addhi = 4705,
  CODE_FOR_atomic_addsi = 4706,
#define CODE_FOR_atomic_adddi CODE_FOR_nothing
  CODE_FOR_atomic_subqi = 4707,
  CODE_FOR_atomic_subhi = 4708,
  CODE_FOR_atomic_subsi = 4709,
#define CODE_FOR_atomic_subdi CODE_FOR_nothing
  CODE_FOR_atomic_andqi = 4710,
  CODE_FOR_atomic_orqi = 4711,
  CODE_FOR_atomic_xorqi = 4712,
  CODE_FOR_atomic_andhi = 4713,
  CODE_FOR_atomic_orhi = 4714,
  CODE_FOR_atomic_xorhi = 4715,
  CODE_FOR_atomic_andsi = 4716,
  CODE_FOR_atomic_orsi = 4717,
  CODE_FOR_atomic_xorsi = 4718,
#define CODE_FOR_atomic_anddi CODE_FOR_nothing
#define CODE_FOR_atomic_ordi CODE_FOR_nothing
#define CODE_FOR_atomic_xordi CODE_FOR_nothing
  CODE_FOR_cbranchqi4 = 4719,
  CODE_FOR_cbranchhi4 = 4720,
  CODE_FOR_cbranchsi4 = 4721,
  CODE_FOR_cbranchdi4 = 4722,
#define CODE_FOR_cbranchti4 CODE_FOR_nothing
  CODE_FOR_cstoreqi4 = 4723,
  CODE_FOR_cstorehi4 = 4724,
  CODE_FOR_cstoresi4 = 4725,
#define CODE_FOR_cstoredi4 CODE_FOR_nothing
  CODE_FOR_cmpsi_1 = 4726,
#define CODE_FOR_cmpdi_1 CODE_FOR_nothing
  CODE_FOR_cmpqi_ext_3 = 4727,
  CODE_FOR_cbranchxf4 = 4728,
  CODE_FOR_cstorexf4 = 4729,
  CODE_FOR_cbranchsf4 = 4730,
  CODE_FOR_cbranchdf4 = 4731,
  CODE_FOR_cstoresf4 = 4732,
  CODE_FOR_cstoredf4 = 4733,
  CODE_FOR_cbranchcc4 = 4734,
  CODE_FOR_cstorecc4 = 4735,
  CODE_FOR_movxi = 4752,
#define CODE_FOR_reload_noff_store CODE_FOR_nothing
#define CODE_FOR_reload_noff_load CODE_FOR_nothing
  CODE_FOR_movoi = 4753,
  CODE_FOR_movti = 4754,
  CODE_FOR_movcdi = 4755,
  CODE_FOR_movqi = 4756,
  CODE_FOR_movhi = 4757,
  CODE_FOR_movsi = 4758,
  CODE_FOR_movdi = 4759,
  CODE_FOR_movstrictqi = 4762,
  CODE_FOR_movstricthi = 4763,
  CODE_FOR_movtf = 4774,
  CODE_FOR_movsf = 4775,
  CODE_FOR_movdf = 4776,
  CODE_FOR_movxf = 4777,
  CODE_FOR_zero_extendsidi2 = 4784,
  CODE_FOR_zero_extendqisi2 = 4788,
  CODE_FOR_zero_extendhisi2 = 4789,
  CODE_FOR_zero_extendqihi2 = 4792,
  CODE_FOR_extendsidi2 = 4794,
  CODE_FOR_extendsfdf2 = 4805,
  CODE_FOR_extendsfxf2 = 4808,
  CODE_FOR_extenddfxf2 = 4809,
  CODE_FOR_truncdfsf2 = 4810,
  CODE_FOR_truncdfsf2_with_temp = 4813,
  CODE_FOR_truncxfsf2 = 4815,
  CODE_FOR_truncxfdf2 = 4816,
  CODE_FOR_fix_truncxfdi2 = 4821,
  CODE_FOR_fix_truncsfdi2 = 4822,
  CODE_FOR_fix_truncdfdi2 = 4823,
  CODE_FOR_fix_truncxfsi2 = 4824,
  CODE_FOR_fix_truncsfsi2 = 4825,
  CODE_FOR_fix_truncdfsi2 = 4826,
  CODE_FOR_fix_truncsfhi2 = 4827,
  CODE_FOR_fix_truncdfhi2 = 4828,
  CODE_FOR_fix_truncxfhi2 = 4829,
  CODE_FOR_fixuns_truncsfsi2 = 4830,
  CODE_FOR_fixuns_truncdfsi2 = 4831,
  CODE_FOR_fixuns_truncsfhi2 = 4834,
  CODE_FOR_fixuns_truncdfhi2 = 4835,
  CODE_FOR_floatsisf2 = 4858,
#define CODE_FOR_floatdisf2 CODE_FOR_nothing
  CODE_FOR_floatsidf2 = 4859,
#define CODE_FOR_floatdidf2 CODE_FOR_nothing
  CODE_FOR_floatunsqisf2 = 4874,
  CODE_FOR_floatunshisf2 = 4875,
  CODE_FOR_floatunsqidf2 = 4876,
  CODE_FOR_floatunshidf2 = 4877,
  CODE_FOR_floatunssisf2 = 4881,
  CODE_FOR_floatunssidf2 = 4882,
  CODE_FOR_floatunssixf2 = 4883,
#define CODE_FOR_floatunsdisf2 CODE_FOR_nothing
#define CODE_FOR_floatunsdidf2 CODE_FOR_nothing
  CODE_FOR_addqi3 = 4886,
  CODE_FOR_addhi3 = 4887,
  CODE_FOR_addsi3 = 4888,
  CODE_FOR_adddi3 = 4889,
#define CODE_FOR_addti3 CODE_FOR_nothing
  CODE_FOR_addvqi4 = 4897,
  CODE_FOR_addvhi4 = 4898,
  CODE_FOR_addvsi4 = 4899,
#define CODE_FOR_addvdi4 CODE_FOR_nothing
  CODE_FOR_subqi3 = 4905,
  CODE_FOR_subhi3 = 4906,
  CODE_FOR_subsi3 = 4907,
  CODE_FOR_subdi3 = 4908,
#define CODE_FOR_subti3 CODE_FOR_nothing
  CODE_FOR_subvqi4 = 4910,
  CODE_FOR_subvhi4 = 4911,
  CODE_FOR_subvsi4 = 4912,
#define CODE_FOR_subvdi4 CODE_FOR_nothing
  CODE_FOR_addqi3_cconly_overflow = 4913,
  CODE_FOR_addxf3 = 4914,
  CODE_FOR_subxf3 = 4915,
  CODE_FOR_addsf3 = 4916,
  CODE_FOR_subsf3 = 4917,
  CODE_FOR_adddf3 = 4918,
  CODE_FOR_subdf3 = 4919,
  CODE_FOR_mulhi3 = 4920,
  CODE_FOR_mulsi3 = 4921,
#define CODE_FOR_muldi3 CODE_FOR_nothing
  CODE_FOR_mulqi3 = 4922,
  CODE_FOR_mulvsi4 = 4923,
#define CODE_FOR_mulvdi4 CODE_FOR_nothing
  CODE_FOR_umulvsi4 = 4924,
#define CODE_FOR_umulvdi4 CODE_FOR_nothing
  CODE_FOR_mulvqi4 = 4925,
  CODE_FOR_umulvqi4 = 4926,
  CODE_FOR_mulsidi3 = 4927,
  CODE_FOR_umulsidi3 = 4928,
#define CODE_FOR_mulditi3 CODE_FOR_nothing
#define CODE_FOR_umulditi3 CODE_FOR_nothing
  CODE_FOR_mulqihi3 = 4929,
  CODE_FOR_umulqihi3 = 4930,
  CODE_FOR_smulsi3_highpart = 4933,
  CODE_FOR_umulsi3_highpart = 4934,
#define CODE_FOR_smuldi3_highpart CODE_FOR_nothing
#define CODE_FOR_umuldi3_highpart CODE_FOR_nothing
  CODE_FOR_mulxf3 = 4935,
  CODE_FOR_mulsf3 = 4936,
  CODE_FOR_muldf3 = 4937,
  CODE_FOR_divxf3 = 4938,
  CODE_FOR_divdf3 = 4939,
  CODE_FOR_divsf3 = 4940,
  CODE_FOR_divmodhi4 = 4941,
  CODE_FOR_divmodsi4 = 4942,
#define CODE_FOR_divmoddi4 CODE_FOR_nothing
  CODE_FOR_divmodqi4 = 4948,
  CODE_FOR_udivmodhi4 = 4949,
  CODE_FOR_udivmodsi4 = 4950,
#define CODE_FOR_udivmoddi4 CODE_FOR_nothing
  CODE_FOR_udivmodqi4 = 4957,
  CODE_FOR_testsi_ccno_1 = 4958,
  CODE_FOR_testqi_ccz_1 = 4959,
#define CODE_FOR_testdi_ccno_1 CODE_FOR_nothing
  CODE_FOR_testqi_ext_ccno_0 = 4960,
  CODE_FOR_andqi3 = 4976,
  CODE_FOR_andhi3 = 4977,
  CODE_FOR_andsi3 = 4978,
#define CODE_FOR_anddi3 CODE_FOR_nothing
  CODE_FOR_iorqi3 = 4989,
  CODE_FOR_xorqi3 = 4990,
  CODE_FOR_iorhi3 = 4991,
  CODE_FOR_xorhi3 = 4992,
  CODE_FOR_iorsi3 = 4993,
  CODE_FOR_xorsi3 = 4994,
#define CODE_FOR_iordi3 CODE_FOR_nothing
#define CODE_FOR_xordi3 CODE_FOR_nothing
  CODE_FOR_xorqi_cc_ext_1 = 5003,
  CODE_FOR_negqi2 = 5004,
  CODE_FOR_neghi2 = 5005,
  CODE_FOR_negsi2 = 5006,
  CODE_FOR_negdi2 = 5007,
#define CODE_FOR_negti2 CODE_FOR_nothing
  CODE_FOR_negvqi3 = 5009,
  CODE_FOR_negvhi3 = 5010,
  CODE_FOR_negvsi3 = 5011,
#define CODE_FOR_negvdi3 CODE_FOR_nothing
  CODE_FOR_abssf2 = 5012,
  CODE_FOR_negsf2 = 5013,
  CODE_FOR_absdf2 = 5014,
  CODE_FOR_negdf2 = 5015,
  CODE_FOR_absxf2 = 5016,
  CODE_FOR_negxf2 = 5017,
  CODE_FOR_abstf2 = 5018,
  CODE_FOR_negtf2 = 5019,
  CODE_FOR_copysignsf3 = 5025,
  CODE_FOR_copysigndf3 = 5026,
  CODE_FOR_copysigntf3 = 5027,
  CODE_FOR_one_cmplqi2 = 5034,
  CODE_FOR_one_cmplhi2 = 5035,
  CODE_FOR_one_cmplsi2 = 5036,
#define CODE_FOR_one_cmpldi2 CODE_FOR_nothing
  CODE_FOR_ashlqi3 = 5042,
  CODE_FOR_ashlhi3 = 5043,
  CODE_FOR_ashlsi3 = 5044,
  CODE_FOR_ashldi3 = 5045,
#define CODE_FOR_ashlti3 CODE_FOR_nothing
  CODE_FOR_x86_shiftsi_adj_1 = 5048,
#define CODE_FOR_x86_shiftdi_adj_1 CODE_FOR_nothing
  CODE_FOR_x86_shiftsi_adj_2 = 5049,
#define CODE_FOR_x86_shiftdi_adj_2 CODE_FOR_nothing
  CODE_FOR_lshrqi3 = 5052,
  CODE_FOR_ashrqi3 = 5053,
  CODE_FOR_lshrhi3 = 5054,
  CODE_FOR_ashrhi3 = 5055,
  CODE_FOR_lshrsi3 = 5056,
  CODE_FOR_ashrsi3 = 5057,
  CODE_FOR_lshrdi3 = 5058,
  CODE_FOR_ashrdi3 = 5059,
#define CODE_FOR_lshrti3 CODE_FOR_nothing
#define CODE_FOR_ashrti3 CODE_FOR_nothing
  CODE_FOR_x86_shiftsi_adj_3 = 5064,
#define CODE_FOR_x86_shiftdi_adj_3 CODE_FOR_nothing
#define CODE_FOR_rotlti3 CODE_FOR_nothing
#define CODE_FOR_rotrti3 CODE_FOR_nothing
  CODE_FOR_rotldi3 = 5067,
  CODE_FOR_rotrdi3 = 5068,
  CODE_FOR_rotlqi3 = 5069,
  CODE_FOR_rotrqi3 = 5070,
  CODE_FOR_rotlhi3 = 5071,
  CODE_FOR_rotrhi3 = 5072,
  CODE_FOR_rotlsi3 = 5073,
  CODE_FOR_rotrsi3 = 5074,
  CODE_FOR_extv = 5081,
  CODE_FOR_extzv = 5082,
  CODE_FOR_insv = 5083,
  CODE_FOR_indirect_jump = 5112,
  CODE_FOR_tablejump = 5113,
  CODE_FOR_call = 5118,
  CODE_FOR_sibcall = 5119,
  CODE_FOR_call_pop = 5124,
  CODE_FOR_call_value = 5129,
  CODE_FOR_sibcall_value = 5130,
  CODE_FOR_call_value_pop = 5135,
  CODE_FOR_untyped_call = 5138,
  CODE_FOR_memory_blockage = 5139,
  CODE_FOR_return = 5140,
  CODE_FOR_simple_return = 5141,
  CODE_FOR_prologue = 5142,
  CODE_FOR_epilogue = 5143,
  CODE_FOR_sibcall_epilogue = 5144,
  CODE_FOR_eh_return = 5145,
  CODE_FOR_split_stack_prologue = 5147,
  CODE_FOR_split_stack_space_check = 5148,
  CODE_FOR_ffssi2 = 5149,
#define CODE_FOR_ffsdi2 CODE_FOR_nothing
  CODE_FOR_ctzhi2 = 5151,
  CODE_FOR_ctzsi2 = 5152,
#define CODE_FOR_ctzdi2 CODE_FOR_nothing
  CODE_FOR_clzhi2 = 5155,
  CODE_FOR_clzsi2 = 5156,
#define CODE_FOR_clzdi2 CODE_FOR_nothing
  CODE_FOR_clzhi2_lzcnt = 5157,
  CODE_FOR_clzsi2_lzcnt = 5158,
#define CODE_FOR_clzdi2_lzcnt CODE_FOR_nothing
  CODE_FOR_bmi2_bzhi_si3 = 5161,
#define CODE_FOR_bmi2_bzhi_di3 CODE_FOR_nothing
  CODE_FOR_popcounthi2 = 5162,
  CODE_FOR_popcountsi2 = 5163,
#define CODE_FOR_popcountdi2 CODE_FOR_nothing
#define CODE_FOR_bswapdi2 CODE_FOR_nothing
  CODE_FOR_bswapsi2 = 5166,
  CODE_FOR_paritydi2 = 5167,
  CODE_FOR_paritysi2 = 5168,
  CODE_FOR_tls_global_dynamic_32 = 5171,
#define CODE_FOR_tls_global_dynamic_64_si CODE_FOR_nothing
#define CODE_FOR_tls_global_dynamic_64_di CODE_FOR_nothing
  CODE_FOR_tls_local_dynamic_base_32 = 5172,
#define CODE_FOR_tls_local_dynamic_base_64_si CODE_FOR_nothing
#define CODE_FOR_tls_local_dynamic_base_64_di CODE_FOR_nothing
  CODE_FOR_tls_dynamic_gnu2_32 = 5174,
#define CODE_FOR_tls_dynamic_gnu2_64 CODE_FOR_nothing
  CODE_FOR_rsqrtsf2 = 5177,
  CODE_FOR_sqrtsf2 = 5178,
  CODE_FOR_sqrtdf2 = 5179,
  CODE_FOR_fmodxf3 = 5180,
  CODE_FOR_fmodsf3 = 5181,
  CODE_FOR_fmoddf3 = 5182,
  CODE_FOR_remainderxf3 = 5183,
  CODE_FOR_remaindersf3 = 5184,
  CODE_FOR_remainderdf3 = 5185,
  CODE_FOR_sincossf3 = 5192,
  CODE_FOR_sincosdf3 = 5193,
  CODE_FOR_tanxf2 = 5194,
  CODE_FOR_tansf2 = 5195,
  CODE_FOR_tandf2 = 5196,
  CODE_FOR_atan2xf3 = 5197,
  CODE_FOR_atan2sf3 = 5198,
  CODE_FOR_atan2df3 = 5199,
  CODE_FOR_atanxf2 = 5200,
  CODE_FOR_atansf2 = 5201,
  CODE_FOR_atandf2 = 5202,
  CODE_FOR_asinxf2 = 5203,
  CODE_FOR_asinsf2 = 5204,
  CODE_FOR_asindf2 = 5205,
  CODE_FOR_acosxf2 = 5206,
  CODE_FOR_acossf2 = 5207,
  CODE_FOR_acosdf2 = 5208,
  CODE_FOR_logxf2 = 5209,
  CODE_FOR_logsf2 = 5210,
  CODE_FOR_logdf2 = 5211,
  CODE_FOR_log10xf2 = 5212,
  CODE_FOR_log10sf2 = 5213,
  CODE_FOR_log10df2 = 5214,
  CODE_FOR_log2xf2 = 5215,
  CODE_FOR_log2sf2 = 5216,
  CODE_FOR_log2df2 = 5217,
  CODE_FOR_log1pxf2 = 5218,
  CODE_FOR_log1psf2 = 5219,
  CODE_FOR_log1pdf2 = 5220,
  CODE_FOR_logbxf2 = 5221,
  CODE_FOR_logbsf2 = 5222,
  CODE_FOR_logbdf2 = 5223,
  CODE_FOR_ilogbxf2 = 5224,
  CODE_FOR_ilogbsf2 = 5225,
  CODE_FOR_ilogbdf2 = 5226,
  CODE_FOR_expNcorexf3 = 5227,
  CODE_FOR_expxf2 = 5228,
  CODE_FOR_expsf2 = 5229,
  CODE_FOR_expdf2 = 5230,
  CODE_FOR_exp10xf2 = 5231,
  CODE_FOR_exp10sf2 = 5232,
  CODE_FOR_exp10df2 = 5233,
  CODE_FOR_exp2xf2 = 5234,
  CODE_FOR_exp2sf2 = 5235,
  CODE_FOR_exp2df2 = 5236,
  CODE_FOR_expm1xf2 = 5237,
  CODE_FOR_expm1sf2 = 5238,
  CODE_FOR_expm1df2 = 5239,
  CODE_FOR_ldexpxf3 = 5240,
  CODE_FOR_ldexpsf3 = 5241,
  CODE_FOR_ldexpdf3 = 5242,
  CODE_FOR_scalbxf3 = 5243,
  CODE_FOR_scalbsf3 = 5244,
  CODE_FOR_scalbdf3 = 5245,
  CODE_FOR_significandxf2 = 5246,
  CODE_FOR_significandsf2 = 5247,
  CODE_FOR_significanddf2 = 5248,
  CODE_FOR_rintsf2 = 5249,
  CODE_FOR_rintdf2 = 5250,
  CODE_FOR_roundsf2 = 5251,
  CODE_FOR_rounddf2 = 5252,
  CODE_FOR_roundxf2 = 5253,
  CODE_FOR_lrintxfhi2 = 5263,
  CODE_FOR_lrintxfsi2 = 5264,
  CODE_FOR_lrintxfdi2 = 5265,
  CODE_FOR_lrintsfsi2 = 5266,
#define CODE_FOR_lrintsfdi2 CODE_FOR_nothing
  CODE_FOR_lrintdfsi2 = 5267,
#define CODE_FOR_lrintdfdi2 CODE_FOR_nothing
  CODE_FOR_lroundsfhi2 = 5268,
  CODE_FOR_lrounddfhi2 = 5269,
  CODE_FOR_lroundxfhi2 = 5270,
  CODE_FOR_lroundsfsi2 = 5271,
  CODE_FOR_lrounddfsi2 = 5272,
  CODE_FOR_lroundxfsi2 = 5273,
  CODE_FOR_lroundsfdi2 = 5274,
  CODE_FOR_lrounddfdi2 = 5275,
  CODE_FOR_lroundxfdi2 = 5276,
  CODE_FOR_floorxf2 = 5280,
  CODE_FOR_ceilxf2 = 5281,
  CODE_FOR_btruncxf2 = 5282,
  CODE_FOR_floorsf2 = 5283,
  CODE_FOR_ceilsf2 = 5284,
  CODE_FOR_btruncsf2 = 5285,
  CODE_FOR_floordf2 = 5286,
  CODE_FOR_ceildf2 = 5287,
  CODE_FOR_btruncdf2 = 5288,
  CODE_FOR_nearbyintxf2 = 5290,
  CODE_FOR_nearbyintsf2 = 5291,
  CODE_FOR_nearbyintdf2 = 5292,
  CODE_FOR_lfloorxfhi2 = 5311,
  CODE_FOR_lceilxfhi2 = 5312,
  CODE_FOR_lfloorxfsi2 = 5313,
  CODE_FOR_lceilxfsi2 = 5314,
  CODE_FOR_lfloorxfdi2 = 5315,
  CODE_FOR_lceilxfdi2 = 5316,
  CODE_FOR_lfloorsfsi2 = 5317,
  CODE_FOR_lceilsfsi2 = 5318,
#define CODE_FOR_lfloorsfdi2 CODE_FOR_nothing
#define CODE_FOR_lceilsfdi2 CODE_FOR_nothing
  CODE_FOR_lfloordfsi2 = 5319,
  CODE_FOR_lceildfsi2 = 5320,
#define CODE_FOR_lfloordfdi2 CODE_FOR_nothing
#define CODE_FOR_lceildfdi2 CODE_FOR_nothing
  CODE_FOR_isinfxf2 = 5323,
  CODE_FOR_isinfsf2 = 5324,
  CODE_FOR_isinfdf2 = 5325,
  CODE_FOR_signbitxf2 = 5326,
  CODE_FOR_signbitdf2 = 5327,
  CODE_FOR_signbitsf2 = 5328,
  CODE_FOR_movmemsi = 5329,
#define CODE_FOR_movmemdi CODE_FOR_nothing
  CODE_FOR_strmov = 5330,
  CODE_FOR_strmov_singleop = 5331,
  CODE_FOR_rep_mov = 5332,
  CODE_FOR_setmemsi = 5333,
#define CODE_FOR_setmemdi CODE_FOR_nothing
  CODE_FOR_strset = 5334,
  CODE_FOR_strset_singleop = 5335,
  CODE_FOR_rep_stos = 5336,
  CODE_FOR_cmpstrnsi = 5337,
  CODE_FOR_cmpintqi = 5338,
  CODE_FOR_cmpstrnqi_nz_1 = 5339,
  CODE_FOR_cmpstrnqi_1 = 5340,
  CODE_FOR_strlensi = 5341,
  CODE_FOR_strlendi = 5342,
  CODE_FOR_strlenqi_1 = 5343,
  CODE_FOR_movqicc = 5346,
  CODE_FOR_movhicc = 5347,
  CODE_FOR_movsicc = 5348,
#define CODE_FOR_movdicc CODE_FOR_nothing
  CODE_FOR_x86_movsicc_0_m1 = 5349,
#define CODE_FOR_x86_movdicc_0_m1 CODE_FOR_nothing
  CODE_FOR_movsfcc = 5361,
  CODE_FOR_movdfcc = 5362,
  CODE_FOR_movxfcc = 5363,
  CODE_FOR_addqicc = 5370,
  CODE_FOR_addhicc = 5371,
  CODE_FOR_addsicc = 5372,
#define CODE_FOR_adddicc CODE_FOR_nothing
  CODE_FOR_allocate_stack = 5373,
  CODE_FOR_probe_stack = 5374,
  CODE_FOR_builtin_setjmp_receiver = 5375,
  CODE_FOR_prefetch = 5478,
  CODE_FOR_stack_protect_set = 5479,
  CODE_FOR_stack_protect_test = 5480,
  CODE_FOR_lwp_llwpcb = 5481,
  CODE_FOR_lwp_slwpcb = 5482,
  CODE_FOR_lwp_lwpvalsi3 = 5483,
#define CODE_FOR_lwp_lwpvaldi3 CODE_FOR_nothing
  CODE_FOR_lwp_lwpinssi3 = 5484,
#define CODE_FOR_lwp_lwpinsdi3 CODE_FOR_nothing
  CODE_FOR_pause = 5485,
  CODE_FOR_xbegin = 5486,
  CODE_FOR_xtest = 5487,
  CODE_FOR_bnd32_mk = 5488,
  CODE_FOR_bnd64_mk = 5489,
  CODE_FOR_movbnd32 = 5490,
  CODE_FOR_movbnd64 = 5491,
  CODE_FOR_bnd32_cl = 5492,
  CODE_FOR_bnd32_cu = 5493,
  CODE_FOR_bnd32_cn = 5494,
  CODE_FOR_bnd64_cl = 5495,
  CODE_FOR_bnd64_cu = 5496,
  CODE_FOR_bnd64_cn = 5497,
  CODE_FOR_bnd32_ldx = 5498,
  CODE_FOR_bnd64_ldx = 5499,
  CODE_FOR_bnd32_stx = 5500,
  CODE_FOR_bnd64_stx = 5501,
  CODE_FOR_movv8qi = 5502,
  CODE_FOR_movv4hi = 5503,
  CODE_FOR_movv2si = 5504,
  CODE_FOR_movv1di = 5505,
  CODE_FOR_movv2sf = 5506,
  CODE_FOR_movmisalignv8qi = 5512,
  CODE_FOR_movmisalignv4hi = 5513,
  CODE_FOR_movmisalignv2si = 5514,
  CODE_FOR_movmisalignv1di = 5515,
  CODE_FOR_movmisalignv2sf = 5516,
  CODE_FOR_mmx_addv2sf3 = 5517,
  CODE_FOR_mmx_subv2sf3 = 5518,
  CODE_FOR_mmx_subrv2sf3 = 5519,
  CODE_FOR_mmx_mulv2sf3 = 5520,
  CODE_FOR_mmx_smaxv2sf3 = 5521,
  CODE_FOR_mmx_sminv2sf3 = 5522,
  CODE_FOR_mmx_eqv2sf3 = 5523,
  CODE_FOR_vec_setv2sf = 5524,
  CODE_FOR_vec_extractv2sf = 5527,
  CODE_FOR_vec_initv2sf = 5528,
  CODE_FOR_mmx_addv8qi3 = 5529,
  CODE_FOR_mmx_subv8qi3 = 5530,
  CODE_FOR_mmx_addv4hi3 = 5531,
  CODE_FOR_mmx_subv4hi3 = 5532,
  CODE_FOR_mmx_addv2si3 = 5533,
  CODE_FOR_mmx_subv2si3 = 5534,
  CODE_FOR_mmx_addv1di3 = 5535,
  CODE_FOR_mmx_subv1di3 = 5536,
  CODE_FOR_mmx_ssaddv8qi3 = 5537,
  CODE_FOR_mmx_usaddv8qi3 = 5538,
  CODE_FOR_mmx_sssubv8qi3 = 5539,
  CODE_FOR_mmx_ussubv8qi3 = 5540,
  CODE_FOR_mmx_ssaddv4hi3 = 5541,
  CODE_FOR_mmx_usaddv4hi3 = 5542,
  CODE_FOR_mmx_sssubv4hi3 = 5543,
  CODE_FOR_mmx_ussubv4hi3 = 5544,
  CODE_FOR_mmx_mulv4hi3 = 5545,
  CODE_FOR_mmx_smulv4hi3_highpart = 5546,
  CODE_FOR_mmx_umulv4hi3_highpart = 5547,
  CODE_FOR_mmx_pmaddwd = 5548,
  CODE_FOR_mmx_pmulhrwv4hi3 = 5549,
  CODE_FOR_sse2_umulv1siv1di3 = 5550,
  CODE_FOR_mmx_smaxv4hi3 = 5551,
  CODE_FOR_mmx_sminv4hi3 = 5552,
  CODE_FOR_mmx_umaxv8qi3 = 5553,
  CODE_FOR_mmx_uminv8qi3 = 5554,
  CODE_FOR_mmx_eqv8qi3 = 5555,
  CODE_FOR_mmx_eqv4hi3 = 5556,
  CODE_FOR_mmx_eqv2si3 = 5557,
  CODE_FOR_mmx_andv8qi3 = 5558,
  CODE_FOR_mmx_iorv8qi3 = 5559,
  CODE_FOR_mmx_xorv8qi3 = 5560,
  CODE_FOR_mmx_andv4hi3 = 5561,
  CODE_FOR_mmx_iorv4hi3 = 5562,
  CODE_FOR_mmx_xorv4hi3 = 5563,
  CODE_FOR_mmx_andv2si3 = 5564,
  CODE_FOR_mmx_iorv2si3 = 5565,
  CODE_FOR_mmx_xorv2si3 = 5566,
  CODE_FOR_mmx_pinsrw = 5567,
  CODE_FOR_mmx_pshufw = 5568,
  CODE_FOR_vec_setv2si = 5569,
  CODE_FOR_vec_extractv2si = 5572,
  CODE_FOR_vec_initv2si = 5573,
  CODE_FOR_vec_setv4hi = 5574,
  CODE_FOR_vec_extractv4hi = 5575,
  CODE_FOR_vec_initv4hi = 5576,
  CODE_FOR_vec_setv8qi = 5577,
  CODE_FOR_vec_extractv8qi = 5578,
  CODE_FOR_vec_initv8qi = 5579,
  CODE_FOR_mmx_uavgv8qi3 = 5580,
  CODE_FOR_mmx_uavgv4hi3 = 5581,
  CODE_FOR_mmx_maskmovq = 5582,
  CODE_FOR_mmx_emms = 5583,
  CODE_FOR_mmx_femms = 5584,
  CODE_FOR_movv64qi = 5585,
  CODE_FOR_movv32qi = 5586,
  CODE_FOR_movv16qi = 5587,
  CODE_FOR_movv32hi = 5588,
  CODE_FOR_movv16hi = 5589,
  CODE_FOR_movv8hi = 5590,
  CODE_FOR_movv16si = 5591,
  CODE_FOR_movv8si = 5592,
  CODE_FOR_movv4si = 5593,
  CODE_FOR_movv8di = 5594,
  CODE_FOR_movv4di = 5595,
  CODE_FOR_movv2di = 5596,
  CODE_FOR_movv4ti = 5597,
  CODE_FOR_movv2ti = 5598,
  CODE_FOR_movv1ti = 5599,
  CODE_FOR_movv16sf = 5600,
  CODE_FOR_movv8sf = 5601,
  CODE_FOR_movv4sf = 5602,
  CODE_FOR_movv8df = 5603,
  CODE_FOR_movv4df = 5604,
  CODE_FOR_movv2df = 5605,
  CODE_FOR_movmisalignv64qi = 5609,
  CODE_FOR_movmisalignv32qi = 5610,
  CODE_FOR_movmisalignv16qi = 5611,
  CODE_FOR_movmisalignv32hi = 5612,
  CODE_FOR_movmisalignv16hi = 5613,
  CODE_FOR_movmisalignv8hi = 5614,
  CODE_FOR_movmisalignv16si = 5615,
  CODE_FOR_movmisalignv8si = 5616,
  CODE_FOR_movmisalignv4si = 5617,
  CODE_FOR_movmisalignv8di = 5618,
  CODE_FOR_movmisalignv4di = 5619,
  CODE_FOR_movmisalignv2di = 5620,
  CODE_FOR_movmisalignv4ti = 5621,
  CODE_FOR_movmisalignv2ti = 5622,
  CODE_FOR_movmisalignv1ti = 5623,
  CODE_FOR_movmisalignv16sf = 5624,
  CODE_FOR_movmisalignv8sf = 5625,
  CODE_FOR_movmisalignv4sf = 5626,
  CODE_FOR_movmisalignv8df = 5627,
  CODE_FOR_movmisalignv4df = 5628,
  CODE_FOR_movmisalignv2df = 5629,
  CODE_FOR_avx512f_loadups512 = 5630,
  CODE_FOR_avx512f_loadups512_mask = 5631,
  CODE_FOR_avx_loadups256 = 5632,
  CODE_FOR_avx_loadups256_mask = 5633,
  CODE_FOR_sse_loadups = 5634,
  CODE_FOR_sse_loadups_mask = 5635,
  CODE_FOR_avx512f_loadupd512 = 5636,
  CODE_FOR_avx512f_loadupd512_mask = 5637,
  CODE_FOR_avx_loadupd256 = 5638,
  CODE_FOR_avx_loadupd256_mask = 5639,
  CODE_FOR_sse2_loadupd = 5640,
  CODE_FOR_sse2_loadupd_mask = 5641,
  CODE_FOR_avx_loaddquv32qi = 5642,
  CODE_FOR_avx_loaddquv32qi_mask = 5643,
  CODE_FOR_sse2_loaddquv16qi = 5644,
  CODE_FOR_sse2_loaddquv16qi_mask = 5645,
  CODE_FOR_avx512f_loaddquv64qi = 5646,
  CODE_FOR_avx512f_loaddquv64qi_mask = 5647,
  CODE_FOR_avx512bw_loaddquv32hi = 5648,
  CODE_FOR_avx512bw_loaddquv32hi_mask = 5649,
  CODE_FOR_avx512vl_loaddquv8hi = 5650,
  CODE_FOR_avx512vl_loaddquv8hi_mask = 5651,
  CODE_FOR_avx512vl_loaddquv16hi = 5652,
  CODE_FOR_avx512vl_loaddquv16hi_mask = 5653,
  CODE_FOR_avx512f_loaddquv16si = 5654,
  CODE_FOR_avx512f_loaddquv16si_mask = 5655,
  CODE_FOR_avx_loaddquv8si = 5656,
  CODE_FOR_avx_loaddquv8si_mask = 5657,
  CODE_FOR_sse2_loaddquv4si = 5658,
  CODE_FOR_sse2_loaddquv4si_mask = 5659,
  CODE_FOR_avx512f_loaddquv8di = 5660,
  CODE_FOR_avx512f_loaddquv8di_mask = 5661,
  CODE_FOR_avx512vl_loaddquv4di = 5662,
  CODE_FOR_avx512vl_loaddquv4di_mask = 5663,
  CODE_FOR_avx512vl_loaddquv2di = 5664,
  CODE_FOR_avx512vl_loaddquv2di_mask = 5665,
#define CODE_FOR_storentdi CODE_FOR_nothing
  CODE_FOR_storentsi = 5666,
  CODE_FOR_storentsf = 5667,
  CODE_FOR_storentdf = 5668,
  CODE_FOR_storentv8di = 5669,
  CODE_FOR_storentv4di = 5670,
  CODE_FOR_storentv2di = 5671,
  CODE_FOR_storentv16sf = 5672,
  CODE_FOR_storentv8sf = 5673,
  CODE_FOR_storentv4sf = 5674,
  CODE_FOR_storentv8df = 5675,
  CODE_FOR_storentv4df = 5676,
  CODE_FOR_storentv2df = 5677,
  CODE_FOR_absv16sf2 = 5678,
  CODE_FOR_negv16sf2 = 5679,
  CODE_FOR_absv8sf2 = 5680,
  CODE_FOR_negv8sf2 = 5681,
  CODE_FOR_absv4sf2 = 5682,
  CODE_FOR_negv4sf2 = 5683,
  CODE_FOR_absv8df2 = 5684,
  CODE_FOR_negv8df2 = 5685,
  CODE_FOR_absv4df2 = 5686,
  CODE_FOR_negv4df2 = 5687,
  CODE_FOR_absv2df2 = 5688,
  CODE_FOR_negv2df2 = 5689,
  CODE_FOR_addv16sf3 = 5696,
  CODE_FOR_addv16sf3_round = 5697,
  CODE_FOR_addv16sf3_mask = 5698,
  CODE_FOR_addv16sf3_mask_round = 5699,
  CODE_FOR_subv16sf3 = 5700,
  CODE_FOR_subv16sf3_round = 5701,
  CODE_FOR_subv16sf3_mask = 5702,
  CODE_FOR_subv16sf3_mask_round = 5703,
  CODE_FOR_addv8sf3 = 5704,
#define CODE_FOR_addv8sf3_round CODE_FOR_nothing
  CODE_FOR_addv8sf3_mask = 5705,
#define CODE_FOR_addv8sf3_mask_round CODE_FOR_nothing
  CODE_FOR_subv8sf3 = 5706,
#define CODE_FOR_subv8sf3_round CODE_FOR_nothing
  CODE_FOR_subv8sf3_mask = 5707,
#define CODE_FOR_subv8sf3_mask_round CODE_FOR_nothing
  CODE_FOR_addv4sf3 = 5708,
#define CODE_FOR_addv4sf3_round CODE_FOR_nothing
  CODE_FOR_addv4sf3_mask = 5709,
#define CODE_FOR_addv4sf3_mask_round CODE_FOR_nothing
  CODE_FOR_subv4sf3 = 5710,
#define CODE_FOR_subv4sf3_round CODE_FOR_nothing
  CODE_FOR_subv4sf3_mask = 5711,
#define CODE_FOR_subv4sf3_mask_round CODE_FOR_nothing
  CODE_FOR_addv8df3 = 5712,
  CODE_FOR_addv8df3_round = 5713,
  CODE_FOR_addv8df3_mask = 5714,
  CODE_FOR_addv8df3_mask_round = 5715,
  CODE_FOR_subv8df3 = 5716,
  CODE_FOR_subv8df3_round = 5717,
  CODE_FOR_subv8df3_mask = 5718,
  CODE_FOR_subv8df3_mask_round = 5719,
  CODE_FOR_addv4df3 = 5720,
#define CODE_FOR_addv4df3_round CODE_FOR_nothing
  CODE_FOR_addv4df3_mask = 5721,
#define CODE_FOR_addv4df3_mask_round CODE_FOR_nothing
  CODE_FOR_subv4df3 = 5722,
#define CODE_FOR_subv4df3_round CODE_FOR_nothing
  CODE_FOR_subv4df3_mask = 5723,
#define CODE_FOR_subv4df3_mask_round CODE_FOR_nothing
  CODE_FOR_addv2df3 = 5724,
#define CODE_FOR_addv2df3_round CODE_FOR_nothing
  CODE_FOR_addv2df3_mask = 5725,
#define CODE_FOR_addv2df3_mask_round CODE_FOR_nothing
  CODE_FOR_subv2df3 = 5726,
#define CODE_FOR_subv2df3_round CODE_FOR_nothing
  CODE_FOR_subv2df3_mask = 5727,
#define CODE_FOR_subv2df3_mask_round CODE_FOR_nothing
  CODE_FOR_mulv16sf3 = 5728,
  CODE_FOR_mulv16sf3_round = 5729,
  CODE_FOR_mulv16sf3_mask = 5730,
  CODE_FOR_mulv16sf3_mask_round = 5731,
  CODE_FOR_mulv8sf3 = 5732,
#define CODE_FOR_mulv8sf3_round CODE_FOR_nothing
  CODE_FOR_mulv8sf3_mask = 5733,
#define CODE_FOR_mulv8sf3_mask_round CODE_FOR_nothing
  CODE_FOR_mulv4sf3 = 5734,
#define CODE_FOR_mulv4sf3_round CODE_FOR_nothing
  CODE_FOR_mulv4sf3_mask = 5735,
#define CODE_FOR_mulv4sf3_mask_round CODE_FOR_nothing
  CODE_FOR_mulv8df3 = 5736,
  CODE_FOR_mulv8df3_round = 5737,
  CODE_FOR_mulv8df3_mask = 5738,
  CODE_FOR_mulv8df3_mask_round = 5739,
  CODE_FOR_mulv4df3 = 5740,
#define CODE_FOR_mulv4df3_round CODE_FOR_nothing
  CODE_FOR_mulv4df3_mask = 5741,
#define CODE_FOR_mulv4df3_mask_round CODE_FOR_nothing
  CODE_FOR_mulv2df3 = 5742,
#define CODE_FOR_mulv2df3_round CODE_FOR_nothing
  CODE_FOR_mulv2df3_mask = 5743,
#define CODE_FOR_mulv2df3_mask_round CODE_FOR_nothing
  CODE_FOR_divv8df3 = 5744,
  CODE_FOR_divv4df3 = 5745,
  CODE_FOR_divv2df3 = 5746,
  CODE_FOR_divv16sf3 = 5747,
  CODE_FOR_divv8sf3 = 5748,
  CODE_FOR_divv4sf3 = 5749,
  CODE_FOR_sqrtv8df2 = 5750,
  CODE_FOR_sqrtv4df2 = 5751,
  CODE_FOR_sqrtv2df2 = 5752,
  CODE_FOR_sqrtv16sf2 = 5753,
  CODE_FOR_sqrtv8sf2 = 5754,
  CODE_FOR_sqrtv4sf2 = 5755,
  CODE_FOR_rsqrtv8sf2 = 5756,
  CODE_FOR_rsqrtv4sf2 = 5757,
  CODE_FOR_smaxv16sf3 = 5758,
  CODE_FOR_smaxv16sf3_round = 5759,
  CODE_FOR_smaxv16sf3_mask = 5760,
  CODE_FOR_smaxv16sf3_mask_round = 5761,
  CODE_FOR_sminv16sf3 = 5762,
  CODE_FOR_sminv16sf3_round = 5763,
  CODE_FOR_sminv16sf3_mask = 5764,
  CODE_FOR_sminv16sf3_mask_round = 5765,
  CODE_FOR_smaxv8sf3 = 5766,
#define CODE_FOR_smaxv8sf3_round CODE_FOR_nothing
  CODE_FOR_smaxv8sf3_mask = 5767,
#define CODE_FOR_smaxv8sf3_mask_round CODE_FOR_nothing
  CODE_FOR_sminv8sf3 = 5768,
#define CODE_FOR_sminv8sf3_round CODE_FOR_nothing
  CODE_FOR_sminv8sf3_mask = 5769,
#define CODE_FOR_sminv8sf3_mask_round CODE_FOR_nothing
  CODE_FOR_smaxv4sf3 = 5770,
#define CODE_FOR_smaxv4sf3_round CODE_FOR_nothing
  CODE_FOR_smaxv4sf3_mask = 5771,
#define CODE_FOR_smaxv4sf3_mask_round CODE_FOR_nothing
  CODE_FOR_sminv4sf3 = 5772,
#define CODE_FOR_sminv4sf3_round CODE_FOR_nothing
  CODE_FOR_sminv4sf3_mask = 5773,
#define CODE_FOR_sminv4sf3_mask_round CODE_FOR_nothing
  CODE_FOR_smaxv8df3 = 5774,
  CODE_FOR_smaxv8df3_round = 5775,
  CODE_FOR_smaxv8df3_mask = 5776,
  CODE_FOR_smaxv8df3_mask_round = 5777,
  CODE_FOR_sminv8df3 = 5778,
  CODE_FOR_sminv8df3_round = 5779,
  CODE_FOR_sminv8df3_mask = 5780,
  CODE_FOR_sminv8df3_mask_round = 5781,
  CODE_FOR_smaxv4df3 = 5782,
#define CODE_FOR_smaxv4df3_round CODE_FOR_nothing
  CODE_FOR_smaxv4df3_mask = 5783,
#define CODE_FOR_smaxv4df3_mask_round CODE_FOR_nothing
  CODE_FOR_sminv4df3 = 5784,
#define CODE_FOR_sminv4df3_round CODE_FOR_nothing
  CODE_FOR_sminv4df3_mask = 5785,
#define CODE_FOR_sminv4df3_mask_round CODE_FOR_nothing
  CODE_FOR_smaxv2df3 = 5786,
#define CODE_FOR_smaxv2df3_round CODE_FOR_nothing
  CODE_FOR_smaxv2df3_mask = 5787,
#define CODE_FOR_smaxv2df3_mask_round CODE_FOR_nothing
  CODE_FOR_sminv2df3 = 5788,
#define CODE_FOR_sminv2df3_round CODE_FOR_nothing
  CODE_FOR_sminv2df3_mask = 5789,
#define CODE_FOR_sminv2df3_mask_round CODE_FOR_nothing
  CODE_FOR_sse3_haddv2df3 = 5790,
  CODE_FOR_reduc_splus_v8df = 5791,
  CODE_FOR_reduc_splus_v4df = 5792,
  CODE_FOR_reduc_splus_v2df = 5793,
  CODE_FOR_reduc_splus_v16sf = 5794,
  CODE_FOR_reduc_splus_v8sf = 5795,
  CODE_FOR_reduc_splus_v4sf = 5796,
  CODE_FOR_reduc_smax_v32qi = 5797,
  CODE_FOR_reduc_smin_v32qi = 5798,
  CODE_FOR_reduc_smax_v16hi = 5799,
  CODE_FOR_reduc_smin_v16hi = 5800,
  CODE_FOR_reduc_smax_v8si = 5801,
  CODE_FOR_reduc_smin_v8si = 5802,
  CODE_FOR_reduc_smax_v4di = 5803,
  CODE_FOR_reduc_smin_v4di = 5804,
  CODE_FOR_reduc_smax_v8sf = 5805,
  CODE_FOR_reduc_smin_v8sf = 5806,
  CODE_FOR_reduc_smax_v4df = 5807,
  CODE_FOR_reduc_smin_v4df = 5808,
  CODE_FOR_reduc_smax_v4sf = 5809,
  CODE_FOR_reduc_smin_v4sf = 5810,
  CODE_FOR_reduc_smax_v64qi = 5811,
  CODE_FOR_reduc_smin_v64qi = 5812,
  CODE_FOR_reduc_smax_v32hi = 5813,
  CODE_FOR_reduc_smin_v32hi = 5814,
  CODE_FOR_reduc_smax_v16si = 5815,
  CODE_FOR_reduc_smin_v16si = 5816,
  CODE_FOR_reduc_smax_v8di = 5817,
  CODE_FOR_reduc_smin_v8di = 5818,
  CODE_FOR_reduc_smax_v16sf = 5819,
  CODE_FOR_reduc_smin_v16sf = 5820,
  CODE_FOR_reduc_smax_v8df = 5821,
  CODE_FOR_reduc_smin_v8df = 5822,
  CODE_FOR_reduc_umax_v16si = 5823,
  CODE_FOR_reduc_umin_v16si = 5824,
  CODE_FOR_reduc_umax_v8di = 5825,
  CODE_FOR_reduc_umin_v8di = 5826,
  CODE_FOR_reduc_umax_v32hi = 5827,
  CODE_FOR_reduc_umin_v32hi = 5828,
  CODE_FOR_reduc_umax_v64qi = 5829,
  CODE_FOR_reduc_umin_v64qi = 5830,
  CODE_FOR_reduc_umax_v32qi = 5831,
  CODE_FOR_reduc_umin_v32qi = 5832,
  CODE_FOR_reduc_umax_v16hi = 5833,
  CODE_FOR_reduc_umin_v16hi = 5834,
  CODE_FOR_reduc_umax_v8si = 5835,
  CODE_FOR_reduc_umin_v8si = 5836,
  CODE_FOR_reduc_umax_v4di = 5837,
  CODE_FOR_reduc_umin_v4di = 5838,
  CODE_FOR_reduc_umin_v8hi = 5839,
  CODE_FOR_vcondv64qiv16sf = 5840,
  CODE_FOR_vcondv32hiv16sf = 5841,
  CODE_FOR_vcondv16siv16sf = 5842,
  CODE_FOR_vcondv8div16sf = 5843,
  CODE_FOR_vcondv16sfv16sf = 5844,
  CODE_FOR_vcondv8dfv16sf = 5845,
  CODE_FOR_vcondv64qiv8df = 5846,
  CODE_FOR_vcondv32hiv8df = 5847,
  CODE_FOR_vcondv16siv8df = 5848,
  CODE_FOR_vcondv8div8df = 5849,
  CODE_FOR_vcondv16sfv8df = 5850,
  CODE_FOR_vcondv8dfv8df = 5851,
  CODE_FOR_vcondv32qiv8sf = 5852,
  CODE_FOR_vcondv32qiv4df = 5853,
  CODE_FOR_vcondv16hiv8sf = 5854,
  CODE_FOR_vcondv16hiv4df = 5855,
  CODE_FOR_vcondv8siv8sf = 5856,
  CODE_FOR_vcondv8siv4df = 5857,
  CODE_FOR_vcondv4div8sf = 5858,
  CODE_FOR_vcondv4div4df = 5859,
  CODE_FOR_vcondv8sfv8sf = 5860,
  CODE_FOR_vcondv8sfv4df = 5861,
  CODE_FOR_vcondv4dfv8sf = 5862,
  CODE_FOR_vcondv4dfv4df = 5863,
  CODE_FOR_vcondv16qiv4sf = 5864,
  CODE_FOR_vcondv16qiv2df = 5865,
  CODE_FOR_vcondv8hiv4sf = 5866,
  CODE_FOR_vcondv8hiv2df = 5867,
  CODE_FOR_vcondv4siv4sf = 5868,
  CODE_FOR_vcondv4siv2df = 5869,
  CODE_FOR_vcondv2div4sf = 5870,
  CODE_FOR_vcondv2div2df = 5871,
  CODE_FOR_vcondv4sfv4sf = 5872,
  CODE_FOR_vcondv4sfv2df = 5873,
  CODE_FOR_vcondv2dfv4sf = 5874,
  CODE_FOR_vcondv2dfv2df = 5875,
  CODE_FOR_andv8sf3 = 5876,
  CODE_FOR_andv8sf3_mask = 5877,
  CODE_FOR_iorv8sf3 = 5878,
  CODE_FOR_iorv8sf3_mask = 5879,
  CODE_FOR_xorv8sf3 = 5880,
  CODE_FOR_xorv8sf3_mask = 5881,
  CODE_FOR_andv4sf3 = 5882,
  CODE_FOR_andv4sf3_mask = 5883,
  CODE_FOR_iorv4sf3 = 5884,
  CODE_FOR_iorv4sf3_mask = 5885,
  CODE_FOR_xorv4sf3 = 5886,
  CODE_FOR_xorv4sf3_mask = 5887,
  CODE_FOR_andv4df3 = 5888,
  CODE_FOR_andv4df3_mask = 5889,
  CODE_FOR_iorv4df3 = 5890,
  CODE_FOR_iorv4df3_mask = 5891,
  CODE_FOR_xorv4df3 = 5892,
  CODE_FOR_xorv4df3_mask = 5893,
  CODE_FOR_andv2df3 = 5894,
  CODE_FOR_andv2df3_mask = 5895,
  CODE_FOR_iorv2df3 = 5896,
  CODE_FOR_iorv2df3_mask = 5897,
  CODE_FOR_xorv2df3 = 5898,
  CODE_FOR_xorv2df3_mask = 5899,
  CODE_FOR_andv16sf3 = 5900,
  CODE_FOR_andv16sf3_mask = 5901,
  CODE_FOR_iorv16sf3 = 5902,
  CODE_FOR_iorv16sf3_mask = 5903,
  CODE_FOR_xorv16sf3 = 5904,
  CODE_FOR_xorv16sf3_mask = 5905,
  CODE_FOR_andv8df3 = 5906,
  CODE_FOR_andv8df3_mask = 5907,
  CODE_FOR_iorv8df3 = 5908,
  CODE_FOR_iorv8df3_mask = 5909,
  CODE_FOR_xorv8df3 = 5910,
  CODE_FOR_xorv8df3_mask = 5911,
  CODE_FOR_copysignv16sf3 = 5912,
  CODE_FOR_copysignv8sf3 = 5913,
  CODE_FOR_copysignv4sf3 = 5914,
  CODE_FOR_copysignv8df3 = 5915,
  CODE_FOR_copysignv4df3 = 5916,
  CODE_FOR_copysignv2df3 = 5917,
  CODE_FOR_andtf3 = 5918,
  CODE_FOR_iortf3 = 5919,
  CODE_FOR_xortf3 = 5920,
  CODE_FOR_fmasf4 = 5921,
  CODE_FOR_fmadf4 = 5922,
  CODE_FOR_fmav4sf4 = 5923,
  CODE_FOR_fmav2df4 = 5924,
  CODE_FOR_fmav8sf4 = 5925,
  CODE_FOR_fmav4df4 = 5926,
  CODE_FOR_fmav16sf4 = 5927,
  CODE_FOR_fmav8df4 = 5928,
  CODE_FOR_fmssf4 = 5929,
  CODE_FOR_fmsdf4 = 5930,
  CODE_FOR_fmsv4sf4 = 5931,
  CODE_FOR_fmsv2df4 = 5932,
  CODE_FOR_fmsv8sf4 = 5933,
  CODE_FOR_fmsv4df4 = 5934,
  CODE_FOR_fmsv16sf4 = 5935,
  CODE_FOR_fmsv8df4 = 5936,
  CODE_FOR_fnmasf4 = 5937,
  CODE_FOR_fnmadf4 = 5938,
  CODE_FOR_fnmav4sf4 = 5939,
  CODE_FOR_fnmav2df4 = 5940,
  CODE_FOR_fnmav8sf4 = 5941,
  CODE_FOR_fnmav4df4 = 5942,
  CODE_FOR_fnmav16sf4 = 5943,
  CODE_FOR_fnmav8df4 = 5944,
  CODE_FOR_fnmssf4 = 5945,
  CODE_FOR_fnmsdf4 = 5946,
  CODE_FOR_fnmsv4sf4 = 5947,
  CODE_FOR_fnmsv2df4 = 5948,
  CODE_FOR_fnmsv8sf4 = 5949,
  CODE_FOR_fnmsv4df4 = 5950,
  CODE_FOR_fnmsv16sf4 = 5951,
  CODE_FOR_fnmsv8df4 = 5952,
  CODE_FOR_fma4i_fmadd_sf = 5953,
  CODE_FOR_fma4i_fmadd_df = 5954,
  CODE_FOR_fma4i_fmadd_v4sf = 5955,
  CODE_FOR_fma4i_fmadd_v2df = 5956,
  CODE_FOR_fma4i_fmadd_v8sf = 5957,
  CODE_FOR_fma4i_fmadd_v4df = 5958,
  CODE_FOR_fma4i_fmadd_v16sf = 5959,
  CODE_FOR_fma4i_fmadd_v8df = 5960,
  CODE_FOR_avx512f_fmadd_v16sf_maskz = 5961,
  CODE_FOR_avx512f_fmadd_v16sf_maskz_round = 5962,
  CODE_FOR_avx512vl_fmadd_v8sf_maskz = 5963,
  CODE_FOR_avx512vl_fmadd_v8sf_maskz_round = 5964,
  CODE_FOR_avx512vl_fmadd_v4sf_maskz = 5965,
  CODE_FOR_avx512vl_fmadd_v4sf_maskz_round = 5966,
  CODE_FOR_avx512f_fmadd_v8df_maskz = 5967,
  CODE_FOR_avx512f_fmadd_v8df_maskz_round = 5968,
  CODE_FOR_avx512vl_fmadd_v4df_maskz = 5969,
  CODE_FOR_avx512vl_fmadd_v4df_maskz_round = 5970,
  CODE_FOR_avx512vl_fmadd_v2df_maskz = 5971,
  CODE_FOR_avx512vl_fmadd_v2df_maskz_round = 5972,
  CODE_FOR_fmaddsub_v16sf = 5973,
  CODE_FOR_fmaddsub_v8sf = 5974,
  CODE_FOR_fmaddsub_v4sf = 5975,
  CODE_FOR_fmaddsub_v8df = 5976,
  CODE_FOR_fmaddsub_v4df = 5977,
  CODE_FOR_fmaddsub_v2df = 5978,
  CODE_FOR_avx512f_fmaddsub_v16sf_maskz = 5979,
  CODE_FOR_avx512f_fmaddsub_v16sf_maskz_round = 5980,
  CODE_FOR_avx512vl_fmaddsub_v8sf_maskz = 5981,
  CODE_FOR_avx512vl_fmaddsub_v8sf_maskz_round = 5982,
  CODE_FOR_avx512vl_fmaddsub_v4sf_maskz = 5983,
  CODE_FOR_avx512vl_fmaddsub_v4sf_maskz_round = 5984,
  CODE_FOR_avx512f_fmaddsub_v8df_maskz = 5985,
  CODE_FOR_avx512f_fmaddsub_v8df_maskz_round = 5986,
  CODE_FOR_avx512vl_fmaddsub_v4df_maskz = 5987,
  CODE_FOR_avx512vl_fmaddsub_v4df_maskz_round = 5988,
  CODE_FOR_avx512vl_fmaddsub_v2df_maskz = 5989,
  CODE_FOR_avx512vl_fmaddsub_v2df_maskz_round = 5990,
  CODE_FOR_fmai_vmfmadd_v4sf = 5991,
  CODE_FOR_fmai_vmfmadd_v4sf_round = 5992,
  CODE_FOR_fmai_vmfmadd_v2df = 5993,
  CODE_FOR_fmai_vmfmadd_v2df_round = 5994,
  CODE_FOR_fma4i_vmfmadd_v4sf = 5995,
  CODE_FOR_fma4i_vmfmadd_v2df = 5996,
  CODE_FOR_floatunsv16siv16sf2 = 5997,
  CODE_FOR_floatunsv8siv8sf2 = 5998,
  CODE_FOR_floatunsv4siv4sf2 = 5999,
  CODE_FOR_fixuns_truncv16sfv16si2 = 6000,
  CODE_FOR_fixuns_truncv8sfv8si2 = 6001,
  CODE_FOR_fixuns_truncv4sfv4si2 = 6002,
  CODE_FOR_avx_cvtpd2dq256_2 = 6003,
  CODE_FOR_avx_cvttpd2dq256_2 = 6004,
  CODE_FOR_sse2_cvtpd2ps = 6005,
  CODE_FOR_sse2_cvtpd2ps_mask = 6006,
  CODE_FOR_avx512bw_cvtmask2bv64qi = 6007,
  CODE_FOR_avx512vl_cvtmask2bv16qi = 6008,
  CODE_FOR_avx512vl_cvtmask2bv32qi = 6009,
  CODE_FOR_avx512bw_cvtmask2wv32hi = 6010,
  CODE_FOR_avx512vl_cvtmask2wv16hi = 6011,
  CODE_FOR_avx512vl_cvtmask2wv8hi = 6012,
  CODE_FOR_avx512f_cvtmask2dv16si = 6013,
  CODE_FOR_avx512vl_cvtmask2dv8si = 6014,
  CODE_FOR_avx512vl_cvtmask2dv4si = 6015,
  CODE_FOR_avx512f_cvtmask2qv8di = 6016,
  CODE_FOR_avx512vl_cvtmask2qv4di = 6017,
  CODE_FOR_avx512vl_cvtmask2qv2di = 6018,
  CODE_FOR_vec_unpacks_hi_v4sf = 6019,
  CODE_FOR_vec_unpacks_hi_v8sf = 6020,
  CODE_FOR_vec_unpacks_hi_v16sf = 6021,
  CODE_FOR_vec_unpacks_lo_v4sf = 6022,
  CODE_FOR_vec_unpacks_lo_v8sf = 6023,
  CODE_FOR_vec_unpacks_float_hi_v32hi = 6024,
  CODE_FOR_vec_unpacks_float_hi_v16hi = 6025,
  CODE_FOR_vec_unpacks_float_hi_v8hi = 6026,
  CODE_FOR_vec_unpacks_float_lo_v32hi = 6027,
  CODE_FOR_vec_unpacks_float_lo_v16hi = 6028,
  CODE_FOR_vec_unpacks_float_lo_v8hi = 6029,
  CODE_FOR_vec_unpacku_float_hi_v32hi = 6030,
  CODE_FOR_vec_unpacku_float_hi_v16hi = 6031,
  CODE_FOR_vec_unpacku_float_hi_v8hi = 6032,
  CODE_FOR_vec_unpacku_float_lo_v32hi = 6033,
  CODE_FOR_vec_unpacku_float_lo_v16hi = 6034,
  CODE_FOR_vec_unpacku_float_lo_v8hi = 6035,
  CODE_FOR_vec_unpacks_float_hi_v4si = 6036,
  CODE_FOR_vec_unpacks_float_lo_v4si = 6037,
  CODE_FOR_vec_unpacks_float_hi_v8si = 6038,
  CODE_FOR_vec_unpacks_float_lo_v8si = 6039,
  CODE_FOR_vec_unpacks_float_hi_v16si = 6040,
  CODE_FOR_vec_unpacks_float_lo_v16si = 6041,
  CODE_FOR_vec_unpacku_float_hi_v4si = 6042,
  CODE_FOR_vec_unpacku_float_lo_v4si = 6043,
  CODE_FOR_vec_unpacku_float_hi_v8si = 6044,
  CODE_FOR_vec_unpacku_float_hi_v16si = 6045,
  CODE_FOR_vec_unpacku_float_lo_v8si = 6046,
  CODE_FOR_vec_unpacku_float_lo_v16si = 6047,
  CODE_FOR_vec_pack_trunc_v8df = 6048,
  CODE_FOR_vec_pack_trunc_v4df = 6049,
  CODE_FOR_vec_pack_trunc_v2df = 6050,
  CODE_FOR_vec_pack_sfix_trunc_v8df = 6051,
  CODE_FOR_vec_pack_sfix_trunc_v4df = 6052,
  CODE_FOR_vec_pack_sfix_trunc_v2df = 6053,
  CODE_FOR_vec_pack_ufix_trunc_v8df = 6054,
  CODE_FOR_vec_pack_ufix_trunc_v4df = 6055,
  CODE_FOR_vec_pack_ufix_trunc_v2df = 6056,
  CODE_FOR_vec_pack_sfix_v4df = 6057,
  CODE_FOR_vec_pack_sfix_v2df = 6058,
  CODE_FOR_sse_movhlps_exp = 6059,
  CODE_FOR_sse_movlhps_exp = 6060,
  CODE_FOR_vec_interleave_highv8sf = 6061,
  CODE_FOR_vec_interleave_lowv8sf = 6062,
  CODE_FOR_avx_shufps256 = 6063,
  CODE_FOR_avx_shufps256_mask = 6064,
  CODE_FOR_sse_shufps = 6065,
  CODE_FOR_sse_shufps_mask = 6066,
  CODE_FOR_sse_loadhps_exp = 6067,
  CODE_FOR_sse_loadlps_exp = 6068,
  CODE_FOR_vec_initv16qi = 6069,
  CODE_FOR_vec_initv8hi = 6070,
  CODE_FOR_vec_initv4si = 6071,
  CODE_FOR_vec_initv2di = 6072,
  CODE_FOR_vec_initv4sf = 6073,
  CODE_FOR_vec_initv2df = 6074,
  CODE_FOR_vec_setv32qi = 6077,
  CODE_FOR_vec_setv16qi = 6078,
  CODE_FOR_vec_setv16hi = 6079,
  CODE_FOR_vec_setv8hi = 6080,
  CODE_FOR_vec_setv16si = 6081,
  CODE_FOR_vec_setv8si = 6082,
  CODE_FOR_vec_setv4si = 6083,
  CODE_FOR_vec_setv8di = 6084,
  CODE_FOR_vec_setv4di = 6085,
  CODE_FOR_vec_setv2di = 6086,
  CODE_FOR_vec_setv16sf = 6087,
  CODE_FOR_vec_setv8sf = 6088,
  CODE_FOR_vec_setv4sf = 6089,
  CODE_FOR_vec_setv8df = 6090,
  CODE_FOR_vec_setv4df = 6091,
  CODE_FOR_vec_setv2df = 6092,
  CODE_FOR_avx512dq_vextractf64x2_mask = 6096,
  CODE_FOR_avx512dq_vextracti64x2_mask = 6097,
  CODE_FOR_avx512f_vextractf32x4_mask = 6098,
  CODE_FOR_avx512f_vextracti32x4_mask = 6099,
  CODE_FOR_avx512dq_vextractf32x8_mask = 6100,
  CODE_FOR_avx512dq_vextracti32x8_mask = 6101,
  CODE_FOR_avx512f_vextractf64x4_mask = 6102,
  CODE_FOR_avx512f_vextracti64x4_mask = 6103,
  CODE_FOR_avx512vl_vextractf128v8si = 6106,
  CODE_FOR_avx512vl_vextractf128v8sf = 6107,
  CODE_FOR_avx512vl_vextractf128v4di = 6108,
  CODE_FOR_avx512vl_vextractf128v4df = 6109,
  CODE_FOR_avx_vextractf128v32qi = 6110,
  CODE_FOR_avx_vextractf128v16hi = 6111,
  CODE_FOR_avx_vextractf128v8si = 6112,
  CODE_FOR_avx_vextractf128v4di = 6113,
  CODE_FOR_avx_vextractf128v8sf = 6114,
  CODE_FOR_avx_vextractf128v4df = 6115,
  CODE_FOR_vec_extractv64qi = 6126,
  CODE_FOR_vec_extractv32qi = 6127,
  CODE_FOR_vec_extractv16qi = 6128,
  CODE_FOR_vec_extractv32hi = 6129,
  CODE_FOR_vec_extractv16hi = 6130,
  CODE_FOR_vec_extractv8hi = 6131,
  CODE_FOR_vec_extractv16si = 6132,
  CODE_FOR_vec_extractv8si = 6133,
  CODE_FOR_vec_extractv4si = 6134,
  CODE_FOR_vec_extractv8di = 6135,
  CODE_FOR_vec_extractv4di = 6136,
  CODE_FOR_vec_extractv2di = 6137,
  CODE_FOR_vec_extractv16sf = 6138,
  CODE_FOR_vec_extractv8sf = 6139,
  CODE_FOR_vec_extractv4sf = 6140,
  CODE_FOR_vec_extractv8df = 6141,
  CODE_FOR_vec_extractv4df = 6142,
  CODE_FOR_vec_extractv2df = 6143,
  CODE_FOR_vec_interleave_highv4df = 6144,
  CODE_FOR_vec_interleave_highv2df = 6145,
  CODE_FOR_avx512f_movddup512 = 6146,
  CODE_FOR_avx512f_movddup512_mask = 6147,
  CODE_FOR_avx512f_unpcklpd512 = 6148,
  CODE_FOR_avx512f_unpcklpd512_mask = 6149,
  CODE_FOR_avx_movddup256 = 6150,
  CODE_FOR_avx_movddup256_mask = 6151,
  CODE_FOR_avx_unpcklpd256 = 6152,
  CODE_FOR_avx_unpcklpd256_mask = 6153,
  CODE_FOR_vec_interleave_lowv4df = 6154,
  CODE_FOR_vec_interleave_lowv2df = 6155,
  CODE_FOR_avx512f_vternlogv16si_maskz = 6158,
  CODE_FOR_avx512vl_vternlogv8si_maskz = 6159,
  CODE_FOR_avx512vl_vternlogv4si_maskz = 6160,
  CODE_FOR_avx512f_vternlogv8di_maskz = 6161,
  CODE_FOR_avx512vl_vternlogv4di_maskz = 6162,
  CODE_FOR_avx512vl_vternlogv2di_maskz = 6163,
  CODE_FOR_avx512f_shufps512_mask = 6164,
  CODE_FOR_avx512f_fixupimmv16sf_maskz = 6165,
  CODE_FOR_avx512f_fixupimmv16sf_maskz_round = 6166,
  CODE_FOR_avx512vl_fixupimmv8sf_maskz = 6167,
  CODE_FOR_avx512vl_fixupimmv8sf_maskz_round = 6168,
  CODE_FOR_avx512vl_fixupimmv4sf_maskz = 6169,
  CODE_FOR_avx512vl_fixupimmv4sf_maskz_round = 6170,
  CODE_FOR_avx512f_fixupimmv8df_maskz = 6171,
  CODE_FOR_avx512f_fixupimmv8df_maskz_round = 6172,
  CODE_FOR_avx512vl_fixupimmv4df_maskz = 6173,
  CODE_FOR_avx512vl_fixupimmv4df_maskz_round = 6174,
  CODE_FOR_avx512vl_fixupimmv2df_maskz = 6175,
  CODE_FOR_avx512vl_fixupimmv2df_maskz_round = 6176,
  CODE_FOR_avx512f_sfixupimmv4sf_maskz = 6177,
  CODE_FOR_avx512f_sfixupimmv4sf_maskz_round = 6178,
  CODE_FOR_avx512f_sfixupimmv2df_maskz = 6179,
  CODE_FOR_avx512f_sfixupimmv2df_maskz_round = 6180,
  CODE_FOR_avx512f_shufpd512_mask = 6181,
  CODE_FOR_avx_shufpd256 = 6182,
  CODE_FOR_avx_shufpd256_mask = 6183,
  CODE_FOR_sse2_shufpd = 6184,
  CODE_FOR_sse2_shufpd_mask = 6185,
  CODE_FOR_sse2_loadhpd_exp = 6188,
  CODE_FOR_sse2_loadlpd_exp = 6190,
  CODE_FOR_avx512f_ss_truncatev16siv16qi2_mask_store = 6192,
  CODE_FOR_avx512f_truncatev16siv16qi2_mask_store = 6193,
  CODE_FOR_avx512f_us_truncatev16siv16qi2_mask_store = 6194,
  CODE_FOR_avx512f_ss_truncatev16siv16hi2_mask_store = 6195,
  CODE_FOR_avx512f_truncatev16siv16hi2_mask_store = 6196,
  CODE_FOR_avx512f_us_truncatev16siv16hi2_mask_store = 6197,
  CODE_FOR_avx512f_ss_truncatev8div8si2_mask_store = 6198,
  CODE_FOR_avx512f_truncatev8div8si2_mask_store = 6199,
  CODE_FOR_avx512f_us_truncatev8div8si2_mask_store = 6200,
  CODE_FOR_avx512f_ss_truncatev8div8hi2_mask_store = 6201,
  CODE_FOR_avx512f_truncatev8div8hi2_mask_store = 6202,
  CODE_FOR_avx512f_us_truncatev8div8hi2_mask_store = 6203,
  CODE_FOR_avx512bw_ss_truncatev32hiv32qi2_mask_store = 6204,
  CODE_FOR_avx512bw_truncatev32hiv32qi2_mask_store = 6205,
  CODE_FOR_avx512bw_us_truncatev32hiv32qi2_mask_store = 6206,
  CODE_FOR_avx512vl_ss_truncatev4div4si2_mask_store = 6207,
  CODE_FOR_avx512vl_truncatev4div4si2_mask_store = 6208,
  CODE_FOR_avx512vl_us_truncatev4div4si2_mask_store = 6209,
  CODE_FOR_avx512vl_ss_truncatev8siv8hi2_mask_store = 6210,
  CODE_FOR_avx512vl_truncatev8siv8hi2_mask_store = 6211,
  CODE_FOR_avx512vl_us_truncatev8siv8hi2_mask_store = 6212,
  CODE_FOR_avx512vl_ss_truncatev16hiv16qi2_mask_store = 6213,
  CODE_FOR_avx512vl_truncatev16hiv16qi2_mask_store = 6214,
  CODE_FOR_avx512vl_us_truncatev16hiv16qi2_mask_store = 6215,
  CODE_FOR_negv64qi2 = 6216,
  CODE_FOR_negv32qi2 = 6217,
  CODE_FOR_negv16qi2 = 6218,
  CODE_FOR_negv32hi2 = 6219,
  CODE_FOR_negv16hi2 = 6220,
  CODE_FOR_negv8hi2 = 6221,
  CODE_FOR_negv16si2 = 6222,
  CODE_FOR_negv8si2 = 6223,
  CODE_FOR_negv4si2 = 6224,
  CODE_FOR_negv8di2 = 6225,
  CODE_FOR_negv4di2 = 6226,
  CODE_FOR_negv2di2 = 6227,
  CODE_FOR_addv64qi3 = 6228,
  CODE_FOR_subv64qi3 = 6229,
  CODE_FOR_addv32qi3 = 6230,
  CODE_FOR_subv32qi3 = 6231,
  CODE_FOR_addv16qi3 = 6232,
  CODE_FOR_subv16qi3 = 6233,
  CODE_FOR_addv32hi3 = 6234,
  CODE_FOR_subv32hi3 = 6235,
  CODE_FOR_addv16hi3 = 6236,
  CODE_FOR_subv16hi3 = 6237,
  CODE_FOR_addv8hi3 = 6238,
  CODE_FOR_subv8hi3 = 6239,
  CODE_FOR_addv16si3 = 6240,
  CODE_FOR_subv16si3 = 6241,
  CODE_FOR_addv8si3 = 6242,
  CODE_FOR_subv8si3 = 6243,
  CODE_FOR_addv4si3 = 6244,
  CODE_FOR_subv4si3 = 6245,
  CODE_FOR_addv8di3 = 6246,
  CODE_FOR_subv8di3 = 6247,
  CODE_FOR_addv4di3 = 6248,
  CODE_FOR_subv4di3 = 6249,
  CODE_FOR_addv2di3 = 6250,
  CODE_FOR_subv2di3 = 6251,
  CODE_FOR_addv16si3_mask = 6252,
  CODE_FOR_subv16si3_mask = 6253,
  CODE_FOR_addv8si3_mask = 6254,
  CODE_FOR_subv8si3_mask = 6255,
  CODE_FOR_addv4si3_mask = 6256,
  CODE_FOR_subv4si3_mask = 6257,
  CODE_FOR_addv8di3_mask = 6258,
  CODE_FOR_subv8di3_mask = 6259,
  CODE_FOR_addv4di3_mask = 6260,
  CODE_FOR_subv4di3_mask = 6261,
  CODE_FOR_addv2di3_mask = 6262,
  CODE_FOR_subv2di3_mask = 6263,
  CODE_FOR_addv64qi3_mask = 6264,
  CODE_FOR_subv64qi3_mask = 6265,
  CODE_FOR_addv16qi3_mask = 6266,
  CODE_FOR_subv16qi3_mask = 6267,
  CODE_FOR_addv32qi3_mask = 6268,
  CODE_FOR_subv32qi3_mask = 6269,
  CODE_FOR_addv32hi3_mask = 6270,
  CODE_FOR_subv32hi3_mask = 6271,
  CODE_FOR_addv16hi3_mask = 6272,
  CODE_FOR_subv16hi3_mask = 6273,
  CODE_FOR_addv8hi3_mask = 6274,
  CODE_FOR_subv8hi3_mask = 6275,
  CODE_FOR_avx512bw_ssaddv64qi3 = 6276,
  CODE_FOR_avx512bw_ssaddv64qi3_mask = 6277,
  CODE_FOR_avx512bw_usaddv64qi3 = 6278,
  CODE_FOR_avx512bw_usaddv64qi3_mask = 6279,
  CODE_FOR_avx512bw_sssubv64qi3 = 6280,
  CODE_FOR_avx512bw_sssubv64qi3_mask = 6281,
  CODE_FOR_avx512bw_ussubv64qi3 = 6282,
  CODE_FOR_avx512bw_ussubv64qi3_mask = 6283,
  CODE_FOR_avx2_ssaddv32qi3 = 6284,
  CODE_FOR_avx2_ssaddv32qi3_mask = 6285,
  CODE_FOR_avx2_usaddv32qi3 = 6286,
  CODE_FOR_avx2_usaddv32qi3_mask = 6287,
  CODE_FOR_avx2_sssubv32qi3 = 6288,
  CODE_FOR_avx2_sssubv32qi3_mask = 6289,
  CODE_FOR_avx2_ussubv32qi3 = 6290,
  CODE_FOR_avx2_ussubv32qi3_mask = 6291,
  CODE_FOR_sse2_ssaddv16qi3 = 6292,
  CODE_FOR_sse2_ssaddv16qi3_mask = 6293,
  CODE_FOR_sse2_usaddv16qi3 = 6294,
  CODE_FOR_sse2_usaddv16qi3_mask = 6295,
  CODE_FOR_sse2_sssubv16qi3 = 6296,
  CODE_FOR_sse2_sssubv16qi3_mask = 6297,
  CODE_FOR_sse2_ussubv16qi3 = 6298,
  CODE_FOR_sse2_ussubv16qi3_mask = 6299,
  CODE_FOR_avx512bw_ssaddv32hi3 = 6300,
  CODE_FOR_avx512bw_ssaddv32hi3_mask = 6301,
  CODE_FOR_avx512bw_usaddv32hi3 = 6302,
  CODE_FOR_avx512bw_usaddv32hi3_mask = 6303,
  CODE_FOR_avx512bw_sssubv32hi3 = 6304,
  CODE_FOR_avx512bw_sssubv32hi3_mask = 6305,
  CODE_FOR_avx512bw_ussubv32hi3 = 6306,
  CODE_FOR_avx512bw_ussubv32hi3_mask = 6307,
  CODE_FOR_avx2_ssaddv16hi3 = 6308,
  CODE_FOR_avx2_ssaddv16hi3_mask = 6309,
  CODE_FOR_avx2_usaddv16hi3 = 6310,
  CODE_FOR_avx2_usaddv16hi3_mask = 6311,
  CODE_FOR_avx2_sssubv16hi3 = 6312,
  CODE_FOR_avx2_sssubv16hi3_mask = 6313,
  CODE_FOR_avx2_ussubv16hi3 = 6314,
  CODE_FOR_avx2_ussubv16hi3_mask = 6315,
  CODE_FOR_sse2_ssaddv8hi3 = 6316,
  CODE_FOR_sse2_ssaddv8hi3_mask = 6317,
  CODE_FOR_sse2_usaddv8hi3 = 6318,
  CODE_FOR_sse2_usaddv8hi3_mask = 6319,
  CODE_FOR_sse2_sssubv8hi3 = 6320,
  CODE_FOR_sse2_sssubv8hi3_mask = 6321,
  CODE_FOR_sse2_ussubv8hi3 = 6322,
  CODE_FOR_sse2_ussubv8hi3_mask = 6323,
  CODE_FOR_mulv64qi3 = 6324,
  CODE_FOR_mulv64qi3_mask = 6325,
  CODE_FOR_mulv32qi3 = 6326,
  CODE_FOR_mulv32qi3_mask = 6327,
  CODE_FOR_mulv16qi3 = 6328,
  CODE_FOR_mulv16qi3_mask = 6329,
  CODE_FOR_mulv32hi3 = 6330,
  CODE_FOR_mulv32hi3_mask = 6331,
  CODE_FOR_mulv16hi3 = 6332,
  CODE_FOR_mulv16hi3_mask = 6333,
  CODE_FOR_mulv8hi3 = 6334,
  CODE_FOR_mulv8hi3_mask = 6335,
  CODE_FOR_smulv32hi3_highpart = 6336,
  CODE_FOR_smulv32hi3_highpart_mask = 6337,
  CODE_FOR_umulv32hi3_highpart = 6338,
  CODE_FOR_umulv32hi3_highpart_mask = 6339,
  CODE_FOR_smulv16hi3_highpart = 6340,
  CODE_FOR_smulv16hi3_highpart_mask = 6341,
  CODE_FOR_umulv16hi3_highpart = 6342,
  CODE_FOR_umulv16hi3_highpart_mask = 6343,
  CODE_FOR_smulv8hi3_highpart = 6344,
  CODE_FOR_smulv8hi3_highpart_mask = 6345,
  CODE_FOR_umulv8hi3_highpart = 6346,
  CODE_FOR_umulv8hi3_highpart_mask = 6347,
  CODE_FOR_vec_widen_umult_even_v16si = 6348,
  CODE_FOR_vec_widen_umult_even_v16si_mask = 6349,
  CODE_FOR_vec_widen_umult_even_v8si = 6350,
  CODE_FOR_vec_widen_umult_even_v8si_mask = 6351,
  CODE_FOR_vec_widen_umult_even_v4si = 6352,
  CODE_FOR_vec_widen_umult_even_v4si_mask = 6353,
  CODE_FOR_vec_widen_smult_even_v16si = 6354,
  CODE_FOR_vec_widen_smult_even_v16si_mask = 6355,
  CODE_FOR_vec_widen_smult_even_v8si = 6356,
  CODE_FOR_vec_widen_smult_even_v8si_mask = 6357,
  CODE_FOR_sse4_1_mulv2siv2di3 = 6358,
  CODE_FOR_sse4_1_mulv2siv2di3_mask = 6359,
  CODE_FOR_avx2_pmaddwd = 6360,
  CODE_FOR_sse2_pmaddwd = 6361,
  CODE_FOR_mulv16si3 = 6362,
  CODE_FOR_mulv16si3_mask = 6363,
  CODE_FOR_mulv8si3 = 6364,
  CODE_FOR_mulv8si3_mask = 6365,
  CODE_FOR_mulv4si3 = 6366,
  CODE_FOR_mulv4si3_mask = 6367,
  CODE_FOR_mulv8di3 = 6368,
  CODE_FOR_mulv4di3 = 6369,
  CODE_FOR_mulv2di3 = 6370,
  CODE_FOR_vec_widen_smult_hi_v32qi = 6371,
  CODE_FOR_vec_widen_umult_hi_v32qi = 6372,
  CODE_FOR_vec_widen_smult_hi_v16qi = 6373,
  CODE_FOR_vec_widen_umult_hi_v16qi = 6374,
  CODE_FOR_vec_widen_smult_hi_v16hi = 6375,
  CODE_FOR_vec_widen_umult_hi_v16hi = 6376,
  CODE_FOR_vec_widen_smult_hi_v8hi = 6377,
  CODE_FOR_vec_widen_umult_hi_v8hi = 6378,
  CODE_FOR_vec_widen_smult_hi_v8si = 6379,
  CODE_FOR_vec_widen_umult_hi_v8si = 6380,
  CODE_FOR_vec_widen_smult_hi_v4si = 6381,
  CODE_FOR_vec_widen_umult_hi_v4si = 6382,
  CODE_FOR_vec_widen_smult_lo_v32qi = 6383,
  CODE_FOR_vec_widen_umult_lo_v32qi = 6384,
  CODE_FOR_vec_widen_smult_lo_v16qi = 6385,
  CODE_FOR_vec_widen_umult_lo_v16qi = 6386,
  CODE_FOR_vec_widen_smult_lo_v16hi = 6387,
  CODE_FOR_vec_widen_umult_lo_v16hi = 6388,
  CODE_FOR_vec_widen_smult_lo_v8hi = 6389,
  CODE_FOR_vec_widen_umult_lo_v8hi = 6390,
  CODE_FOR_vec_widen_smult_lo_v8si = 6391,
  CODE_FOR_vec_widen_umult_lo_v8si = 6392,
  CODE_FOR_vec_widen_smult_lo_v4si = 6393,
  CODE_FOR_vec_widen_umult_lo_v4si = 6394,
  CODE_FOR_vec_widen_smult_even_v4si = 6395,
  CODE_FOR_vec_widen_smult_odd_v16si = 6396,
  CODE_FOR_vec_widen_umult_odd_v16si = 6397,
  CODE_FOR_vec_widen_smult_odd_v8si = 6398,
  CODE_FOR_vec_widen_umult_odd_v8si = 6399,
  CODE_FOR_vec_widen_smult_odd_v4si = 6400,
  CODE_FOR_vec_widen_umult_odd_v4si = 6401,
  CODE_FOR_sdot_prodv32hi = 6402,
  CODE_FOR_sdot_prodv16hi = 6403,
  CODE_FOR_sdot_prodv8hi = 6404,
  CODE_FOR_sdot_prodv4si = 6405,
  CODE_FOR_usadv16qi = 6406,
  CODE_FOR_usadv32qi = 6407,
  CODE_FOR_vec_shl_v16qi = 6408,
  CODE_FOR_vec_shl_v8hi = 6409,
  CODE_FOR_vec_shl_v4si = 6410,
  CODE_FOR_vec_shl_v2di = 6411,
  CODE_FOR_vec_shr_v16qi = 6412,
  CODE_FOR_vec_shr_v8hi = 6413,
  CODE_FOR_vec_shr_v4si = 6414,
  CODE_FOR_vec_shr_v2di = 6415,
  CODE_FOR_smaxv32qi3 = 6416,
  CODE_FOR_sminv32qi3 = 6417,
  CODE_FOR_umaxv32qi3 = 6418,
  CODE_FOR_uminv32qi3 = 6419,
  CODE_FOR_smaxv16hi3 = 6420,
  CODE_FOR_sminv16hi3 = 6421,
  CODE_FOR_umaxv16hi3 = 6422,
  CODE_FOR_uminv16hi3 = 6423,
  CODE_FOR_smaxv8si3 = 6424,
  CODE_FOR_sminv8si3 = 6425,
  CODE_FOR_umaxv8si3 = 6426,
  CODE_FOR_uminv8si3 = 6427,
  CODE_FOR_smaxv64qi3 = 6428,
  CODE_FOR_sminv64qi3 = 6429,
  CODE_FOR_umaxv64qi3 = 6430,
  CODE_FOR_uminv64qi3 = 6431,
  CODE_FOR_smaxv32hi3 = 6432,
  CODE_FOR_sminv32hi3 = 6433,
  CODE_FOR_umaxv32hi3 = 6434,
  CODE_FOR_uminv32hi3 = 6435,
  CODE_FOR_smaxv16si3 = 6436,
  CODE_FOR_sminv16si3 = 6437,
  CODE_FOR_umaxv16si3 = 6438,
  CODE_FOR_uminv16si3 = 6439,
  CODE_FOR_smaxv16si3_mask = 6440,
  CODE_FOR_sminv16si3_mask = 6441,
  CODE_FOR_umaxv16si3_mask = 6442,
  CODE_FOR_uminv16si3_mask = 6443,
  CODE_FOR_smaxv8si3_mask = 6444,
  CODE_FOR_sminv8si3_mask = 6445,
  CODE_FOR_umaxv8si3_mask = 6446,
  CODE_FOR_uminv8si3_mask = 6447,
  CODE_FOR_smaxv4si3_mask = 6448,
  CODE_FOR_sminv4si3_mask = 6449,
  CODE_FOR_umaxv4si3_mask = 6450,
  CODE_FOR_uminv4si3_mask = 6451,
  CODE_FOR_smaxv8di3_mask = 6452,
  CODE_FOR_sminv8di3_mask = 6453,
  CODE_FOR_umaxv8di3_mask = 6454,
  CODE_FOR_uminv8di3_mask = 6455,
  CODE_FOR_smaxv4di3_mask = 6456,
  CODE_FOR_sminv4di3_mask = 6457,
  CODE_FOR_umaxv4di3_mask = 6458,
  CODE_FOR_uminv4di3_mask = 6459,
  CODE_FOR_smaxv2di3_mask = 6460,
  CODE_FOR_sminv2di3_mask = 6461,
  CODE_FOR_umaxv2di3_mask = 6462,
  CODE_FOR_uminv2di3_mask = 6463,
  CODE_FOR_smaxv8di3 = 6464,
  CODE_FOR_sminv8di3 = 6465,
  CODE_FOR_umaxv8di3 = 6466,
  CODE_FOR_uminv8di3 = 6467,
  CODE_FOR_smaxv4di3 = 6468,
  CODE_FOR_sminv4di3 = 6469,
  CODE_FOR_umaxv4di3 = 6470,
  CODE_FOR_uminv4di3 = 6471,
  CODE_FOR_smaxv2di3 = 6472,
  CODE_FOR_sminv2di3 = 6473,
  CODE_FOR_umaxv2di3 = 6474,
  CODE_FOR_uminv2di3 = 6475,
  CODE_FOR_smaxv16qi3 = 6476,
  CODE_FOR_sminv16qi3 = 6477,
  CODE_FOR_smaxv8hi3 = 6478,
  CODE_FOR_sminv8hi3 = 6479,
  CODE_FOR_smaxv4si3 = 6480,
  CODE_FOR_sminv4si3 = 6481,
  CODE_FOR_umaxv16qi3 = 6482,
  CODE_FOR_uminv16qi3 = 6483,
  CODE_FOR_umaxv8hi3 = 6484,
  CODE_FOR_uminv8hi3 = 6485,
  CODE_FOR_umaxv4si3 = 6486,
  CODE_FOR_uminv4si3 = 6487,
  CODE_FOR_avx2_eqv32qi3 = 6488,
  CODE_FOR_avx2_eqv16hi3 = 6489,
  CODE_FOR_avx2_eqv8si3 = 6490,
  CODE_FOR_avx2_eqv4di3 = 6491,
  CODE_FOR_avx512bw_eqv64qi3 = 6492,
  CODE_FOR_avx512bw_eqv64qi3_mask = 6493,
  CODE_FOR_avx512vl_eqv16qi3 = 6494,
  CODE_FOR_avx512vl_eqv16qi3_mask = 6495,
  CODE_FOR_avx512vl_eqv32qi3 = 6496,
  CODE_FOR_avx512vl_eqv32qi3_mask = 6497,
  CODE_FOR_avx512bw_eqv32hi3 = 6498,
  CODE_FOR_avx512bw_eqv32hi3_mask = 6499,
  CODE_FOR_avx512vl_eqv16hi3 = 6500,
  CODE_FOR_avx512vl_eqv16hi3_mask = 6501,
  CODE_FOR_avx512vl_eqv8hi3 = 6502,
  CODE_FOR_avx512vl_eqv8hi3_mask = 6503,
  CODE_FOR_avx512f_eqv16si3 = 6504,
  CODE_FOR_avx512f_eqv16si3_mask = 6505,
  CODE_FOR_avx512vl_eqv8si3 = 6506,
  CODE_FOR_avx512vl_eqv8si3_mask = 6507,
  CODE_FOR_avx512vl_eqv4si3 = 6508,
  CODE_FOR_avx512vl_eqv4si3_mask = 6509,
  CODE_FOR_avx512f_eqv8di3 = 6510,
  CODE_FOR_avx512f_eqv8di3_mask = 6511,
  CODE_FOR_avx512vl_eqv4di3 = 6512,
  CODE_FOR_avx512vl_eqv4di3_mask = 6513,
  CODE_FOR_avx512vl_eqv2di3 = 6514,
  CODE_FOR_avx512vl_eqv2di3_mask = 6515,
  CODE_FOR_sse2_eqv16qi3 = 6516,
  CODE_FOR_sse2_eqv8hi3 = 6517,
  CODE_FOR_sse2_eqv4si3 = 6518,
  CODE_FOR_sse4_1_eqv2di3 = 6519,
  CODE_FOR_vcondv64qiv64qi = 6520,
  CODE_FOR_vcondv32hiv64qi = 6521,
  CODE_FOR_vcondv16siv64qi = 6522,
  CODE_FOR_vcondv8div64qi = 6523,
  CODE_FOR_vcondv16sfv64qi = 6524,
  CODE_FOR_vcondv8dfv64qi = 6525,
  CODE_FOR_vcondv64qiv32hi = 6526,
  CODE_FOR_vcondv32hiv32hi = 6527,
  CODE_FOR_vcondv16siv32hi = 6528,
  CODE_FOR_vcondv8div32hi = 6529,
  CODE_FOR_vcondv16sfv32hi = 6530,
  CODE_FOR_vcondv8dfv32hi = 6531,
  CODE_FOR_vcondv64qiv16si = 6532,
  CODE_FOR_vcondv32hiv16si = 6533,
  CODE_FOR_vcondv16siv16si = 6534,
  CODE_FOR_vcondv8div16si = 6535,
  CODE_FOR_vcondv16sfv16si = 6536,
  CODE_FOR_vcondv8dfv16si = 6537,
  CODE_FOR_vcondv64qiv8di = 6538,
  CODE_FOR_vcondv32hiv8di = 6539,
  CODE_FOR_vcondv16siv8di = 6540,
  CODE_FOR_vcondv8div8di = 6541,
  CODE_FOR_vcondv16sfv8di = 6542,
  CODE_FOR_vcondv8dfv8di = 6543,
  CODE_FOR_vcondv32qiv32qi = 6544,
  CODE_FOR_vcondv32qiv16hi = 6545,
  CODE_FOR_vcondv32qiv8si = 6546,
  CODE_FOR_vcondv32qiv4di = 6547,
  CODE_FOR_vcondv16hiv32qi = 6548,
  CODE_FOR_vcondv16hiv16hi = 6549,
  CODE_FOR_vcondv16hiv8si = 6550,
  CODE_FOR_vcondv16hiv4di = 6551,
  CODE_FOR_vcondv8siv32qi = 6552,
  CODE_FOR_vcondv8siv16hi = 6553,
  CODE_FOR_vcondv8siv8si = 6554,
  CODE_FOR_vcondv8siv4di = 6555,
  CODE_FOR_vcondv4div32qi = 6556,
  CODE_FOR_vcondv4div16hi = 6557,
  CODE_FOR_vcondv4div8si = 6558,
  CODE_FOR_vcondv4div4di = 6559,
  CODE_FOR_vcondv8sfv32qi = 6560,
  CODE_FOR_vcondv8sfv16hi = 6561,
  CODE_FOR_vcondv8sfv8si = 6562,
  CODE_FOR_vcondv8sfv4di = 6563,
  CODE_FOR_vcondv4dfv32qi = 6564,
  CODE_FOR_vcondv4dfv16hi = 6565,
  CODE_FOR_vcondv4dfv8si = 6566,
  CODE_FOR_vcondv4dfv4di = 6567,
  CODE_FOR_vcondv16qiv16qi = 6568,
  CODE_FOR_vcondv8hiv16qi = 6569,
  CODE_FOR_vcondv4siv16qi = 6570,
  CODE_FOR_vcondv2div16qi = 6571,
  CODE_FOR_vcondv4sfv16qi = 6572,
  CODE_FOR_vcondv2dfv16qi = 6573,
  CODE_FOR_vcondv16qiv8hi = 6574,
  CODE_FOR_vcondv8hiv8hi = 6575,
  CODE_FOR_vcondv4siv8hi = 6576,
  CODE_FOR_vcondv2div8hi = 6577,
  CODE_FOR_vcondv4sfv8hi = 6578,
  CODE_FOR_vcondv2dfv8hi = 6579,
  CODE_FOR_vcondv16qiv4si = 6580,
  CODE_FOR_vcondv8hiv4si = 6581,
  CODE_FOR_vcondv4siv4si = 6582,
  CODE_FOR_vcondv2div4si = 6583,
  CODE_FOR_vcondv4sfv4si = 6584,
  CODE_FOR_vcondv2dfv4si = 6585,
  CODE_FOR_vcondv2div2di = 6586,
  CODE_FOR_vcondv2dfv2di = 6587,
  CODE_FOR_vconduv64qiv64qi = 6588,
  CODE_FOR_vconduv32hiv64qi = 6589,
  CODE_FOR_vconduv16siv64qi = 6590,
  CODE_FOR_vconduv8div64qi = 6591,
  CODE_FOR_vconduv16sfv64qi = 6592,
  CODE_FOR_vconduv8dfv64qi = 6593,
  CODE_FOR_vconduv64qiv32hi = 6594,
  CODE_FOR_vconduv32hiv32hi = 6595,
  CODE_FOR_vconduv16siv32hi = 6596,
  CODE_FOR_vconduv8div32hi = 6597,
  CODE_FOR_vconduv16sfv32hi = 6598,
  CODE_FOR_vconduv8dfv32hi = 6599,
  CODE_FOR_vconduv64qiv16si = 6600,
  CODE_FOR_vconduv32hiv16si = 6601,
  CODE_FOR_vconduv16siv16si = 6602,
  CODE_FOR_vconduv8div16si = 6603,
  CODE_FOR_vconduv16sfv16si = 6604,
  CODE_FOR_vconduv8dfv16si = 6605,
  CODE_FOR_vconduv64qiv8di = 6606,
  CODE_FOR_vconduv32hiv8di = 6607,
  CODE_FOR_vconduv16siv8di = 6608,
  CODE_FOR_vconduv8div8di = 6609,
  CODE_FOR_vconduv16sfv8di = 6610,
  CODE_FOR_vconduv8dfv8di = 6611,
  CODE_FOR_vconduv32qiv32qi = 6612,
  CODE_FOR_vconduv32qiv16hi = 6613,
  CODE_FOR_vconduv32qiv8si = 6614,
  CODE_FOR_vconduv32qiv4di = 6615,
  CODE_FOR_vconduv16hiv32qi = 6616,
  CODE_FOR_vconduv16hiv16hi = 6617,
  CODE_FOR_vconduv16hiv8si = 6618,
  CODE_FOR_vconduv16hiv4di = 6619,
  CODE_FOR_vconduv8siv32qi = 6620,
  CODE_FOR_vconduv8siv16hi = 6621,
  CODE_FOR_vconduv8siv8si = 6622,
  CODE_FOR_vconduv8siv4di = 6623,
  CODE_FOR_vconduv4div32qi = 6624,
  CODE_FOR_vconduv4div16hi = 6625,
  CODE_FOR_vconduv4div8si = 6626,
  CODE_FOR_vconduv4div4di = 6627,
  CODE_FOR_vconduv8sfv32qi = 6628,
  CODE_FOR_vconduv8sfv16hi = 6629,
  CODE_FOR_vconduv8sfv8si = 6630,
  CODE_FOR_vconduv8sfv4di = 6631,
  CODE_FOR_vconduv4dfv32qi = 6632,
  CODE_FOR_vconduv4dfv16hi = 6633,
  CODE_FOR_vconduv4dfv8si = 6634,
  CODE_FOR_vconduv4dfv4di = 6635,
  CODE_FOR_vconduv16qiv16qi = 6636,
  CODE_FOR_vconduv8hiv16qi = 6637,
  CODE_FOR_vconduv4siv16qi = 6638,
  CODE_FOR_vconduv2div16qi = 6639,
  CODE_FOR_vconduv4sfv16qi = 6640,
  CODE_FOR_vconduv2dfv16qi = 6641,
  CODE_FOR_vconduv16qiv8hi = 6642,
  CODE_FOR_vconduv8hiv8hi = 6643,
  CODE_FOR_vconduv4siv8hi = 6644,
  CODE_FOR_vconduv2div8hi = 6645,
  CODE_FOR_vconduv4sfv8hi = 6646,
  CODE_FOR_vconduv2dfv8hi = 6647,
  CODE_FOR_vconduv16qiv4si = 6648,
  CODE_FOR_vconduv8hiv4si = 6649,
  CODE_FOR_vconduv4siv4si = 6650,
  CODE_FOR_vconduv2div4si = 6651,
  CODE_FOR_vconduv4sfv4si = 6652,
  CODE_FOR_vconduv2dfv4si = 6653,
  CODE_FOR_vconduv2div2di = 6654,
  CODE_FOR_vconduv2dfv2di = 6655,
  CODE_FOR_vec_permv16qi = 6656,
  CODE_FOR_vec_permv8hi = 6657,
  CODE_FOR_vec_permv4si = 6658,
  CODE_FOR_vec_permv2di = 6659,
  CODE_FOR_vec_permv4sf = 6660,
  CODE_FOR_vec_permv2df = 6661,
  CODE_FOR_vec_permv32qi = 6662,
  CODE_FOR_vec_permv16hi = 6663,
  CODE_FOR_vec_permv8si = 6664,
  CODE_FOR_vec_permv4di = 6665,
  CODE_FOR_vec_permv8sf = 6666,
  CODE_FOR_vec_permv4df = 6667,
  CODE_FOR_vec_permv16sf = 6668,
  CODE_FOR_vec_permv8df = 6669,
  CODE_FOR_vec_permv16si = 6670,
  CODE_FOR_vec_permv8di = 6671,
  CODE_FOR_vec_permv32hi = 6672,
  CODE_FOR_vec_permv64qi = 6673,
  CODE_FOR_vec_perm_constv4sf = 6674,
  CODE_FOR_vec_perm_constv4si = 6675,
  CODE_FOR_vec_perm_constv2df = 6676,
  CODE_FOR_vec_perm_constv2di = 6677,
  CODE_FOR_vec_perm_constv16qi = 6678,
  CODE_FOR_vec_perm_constv8hi = 6679,
  CODE_FOR_vec_perm_constv8sf = 6680,
  CODE_FOR_vec_perm_constv4df = 6681,
  CODE_FOR_vec_perm_constv8si = 6682,
  CODE_FOR_vec_perm_constv4di = 6683,
  CODE_FOR_vec_perm_constv32qi = 6684,
  CODE_FOR_vec_perm_constv16hi = 6685,
  CODE_FOR_vec_perm_constv16si = 6686,
  CODE_FOR_vec_perm_constv8di = 6687,
  CODE_FOR_vec_perm_constv16sf = 6688,
  CODE_FOR_vec_perm_constv8df = 6689,
  CODE_FOR_vec_perm_constv32hi = 6690,
  CODE_FOR_vec_perm_constv64qi = 6691,
  CODE_FOR_one_cmplv16si2 = 6692,
  CODE_FOR_one_cmplv8di2 = 6693,
  CODE_FOR_one_cmplv64qi2 = 6694,
  CODE_FOR_one_cmplv32qi2 = 6695,
  CODE_FOR_one_cmplv16qi2 = 6696,
  CODE_FOR_one_cmplv32hi2 = 6697,
  CODE_FOR_one_cmplv16hi2 = 6698,
  CODE_FOR_one_cmplv8hi2 = 6699,
  CODE_FOR_one_cmplv8si2 = 6700,
  CODE_FOR_one_cmplv4si2 = 6701,
  CODE_FOR_one_cmplv4di2 = 6702,
  CODE_FOR_one_cmplv2di2 = 6703,
  CODE_FOR_avx512bw_andnotv64qi3 = 6704,
  CODE_FOR_avx2_andnotv32qi3 = 6705,
  CODE_FOR_sse2_andnotv16qi3 = 6706,
  CODE_FOR_avx512bw_andnotv32hi3 = 6707,
  CODE_FOR_avx2_andnotv16hi3 = 6708,
  CODE_FOR_sse2_andnotv8hi3 = 6709,
  CODE_FOR_avx512f_andnotv16si3 = 6710,
  CODE_FOR_avx2_andnotv8si3 = 6711,
  CODE_FOR_sse2_andnotv4si3 = 6712,
  CODE_FOR_avx512f_andnotv8di3 = 6713,
  CODE_FOR_avx2_andnotv4di3 = 6714,
  CODE_FOR_sse2_andnotv2di3 = 6715,
  CODE_FOR_avx512f_andnotv16si3_mask = 6716,
  CODE_FOR_avx2_andnotv8si3_mask = 6717,
  CODE_FOR_sse2_andnotv4si3_mask = 6718,
  CODE_FOR_avx512f_andnotv8di3_mask = 6719,
  CODE_FOR_avx2_andnotv4di3_mask = 6720,
  CODE_FOR_sse2_andnotv2di3_mask = 6721,
  CODE_FOR_avx512bw_andnotv64qi3_mask = 6722,
  CODE_FOR_sse2_andnotv16qi3_mask = 6723,
  CODE_FOR_avx2_andnotv32qi3_mask = 6724,
  CODE_FOR_avx512bw_andnotv32hi3_mask = 6725,
  CODE_FOR_avx2_andnotv16hi3_mask = 6726,
  CODE_FOR_sse2_andnotv8hi3_mask = 6727,
  CODE_FOR_andv16si3 = 6728,
  CODE_FOR_iorv16si3 = 6729,
  CODE_FOR_xorv16si3 = 6730,
  CODE_FOR_andv8di3 = 6731,
  CODE_FOR_iorv8di3 = 6732,
  CODE_FOR_xorv8di3 = 6733,
  CODE_FOR_andv64qi3 = 6734,
  CODE_FOR_iorv64qi3 = 6735,
  CODE_FOR_xorv64qi3 = 6736,
  CODE_FOR_andv32qi3 = 6737,
  CODE_FOR_iorv32qi3 = 6738,
  CODE_FOR_xorv32qi3 = 6739,
  CODE_FOR_andv16qi3 = 6740,
  CODE_FOR_iorv16qi3 = 6741,
  CODE_FOR_xorv16qi3 = 6742,
  CODE_FOR_andv32hi3 = 6743,
  CODE_FOR_iorv32hi3 = 6744,
  CODE_FOR_xorv32hi3 = 6745,
  CODE_FOR_andv16hi3 = 6746,
  CODE_FOR_iorv16hi3 = 6747,
  CODE_FOR_xorv16hi3 = 6748,
  CODE_FOR_andv8hi3 = 6749,
  CODE_FOR_iorv8hi3 = 6750,
  CODE_FOR_xorv8hi3 = 6751,
  CODE_FOR_andv8si3 = 6752,
  CODE_FOR_iorv8si3 = 6753,
  CODE_FOR_xorv8si3 = 6754,
  CODE_FOR_andv4si3 = 6755,
  CODE_FOR_iorv4si3 = 6756,
  CODE_FOR_xorv4si3 = 6757,
  CODE_FOR_andv4di3 = 6758,
  CODE_FOR_iorv4di3 = 6759,
  CODE_FOR_xorv4di3 = 6760,
  CODE_FOR_andv2di3 = 6761,
  CODE_FOR_iorv2di3 = 6762,
  CODE_FOR_xorv2di3 = 6763,
  CODE_FOR_vec_pack_trunc_v32hi = 6764,
  CODE_FOR_vec_pack_trunc_v16hi = 6765,
  CODE_FOR_vec_pack_trunc_v8hi = 6766,
  CODE_FOR_vec_pack_trunc_v16si = 6767,
  CODE_FOR_vec_pack_trunc_v8si = 6768,
  CODE_FOR_vec_pack_trunc_v4si = 6769,
  CODE_FOR_vec_pack_trunc_v8di = 6770,
  CODE_FOR_vec_pack_trunc_v4di = 6771,
  CODE_FOR_vec_pack_trunc_v2di = 6772,
  CODE_FOR_vec_interleave_highv32qi = 6773,
  CODE_FOR_vec_interleave_highv16hi = 6774,
  CODE_FOR_vec_interleave_highv8si = 6775,
  CODE_FOR_vec_interleave_highv4di = 6776,
  CODE_FOR_vec_interleave_lowv32qi = 6777,
  CODE_FOR_vec_interleave_lowv16hi = 6778,
  CODE_FOR_vec_interleave_lowv8si = 6779,
  CODE_FOR_vec_interleave_lowv4di = 6780,
  CODE_FOR_avx512dq_vinsertf64x2_mask = 6781,
  CODE_FOR_avx512dq_vinserti64x2_mask = 6782,
  CODE_FOR_avx512f_vinsertf32x4_mask = 6783,
  CODE_FOR_avx512f_vinserti32x4_mask = 6784,
  CODE_FOR_avx512dq_vinsertf32x8_mask = 6785,
  CODE_FOR_avx512dq_vinserti32x8_mask = 6786,
  CODE_FOR_avx512f_vinsertf64x4_mask = 6787,
  CODE_FOR_avx512f_vinserti64x4_mask = 6788,
  CODE_FOR_avx512dq_shuf_i64x2_mask = 6789,
  CODE_FOR_avx512dq_shuf_f64x2_mask = 6790,
  CODE_FOR_avx512f_shuf_f64x2_mask = 6791,
  CODE_FOR_avx512f_shuf_i64x2_mask = 6792,
  CODE_FOR_avx512vl_shuf_i32x4_mask = 6793,
  CODE_FOR_avx512vl_shuf_f32x4_mask = 6794,
  CODE_FOR_avx512f_shuf_f32x4_mask = 6795,
  CODE_FOR_avx512f_shuf_i32x4_mask = 6796,
  CODE_FOR_avx512f_pshufdv3_mask = 6797,
  CODE_FOR_avx512vl_pshufdv3_mask = 6798,
  CODE_FOR_avx2_pshufdv3 = 6799,
  CODE_FOR_avx512vl_pshufd_mask = 6800,
  CODE_FOR_sse2_pshufd = 6801,
  CODE_FOR_avx512vl_pshuflwv3_mask = 6802,
  CODE_FOR_avx2_pshuflwv3 = 6803,
  CODE_FOR_avx512vl_pshuflw_mask = 6804,
  CODE_FOR_sse2_pshuflw = 6805,
  CODE_FOR_avx2_pshufhwv3 = 6806,
  CODE_FOR_avx512vl_pshufhwv3_mask = 6807,
  CODE_FOR_avx512vl_pshufhw_mask = 6808,
  CODE_FOR_sse2_pshufhw = 6809,
  CODE_FOR_sse2_loadd = 6810,
  CODE_FOR_vec_unpacks_lo_v64qi = 6819,
  CODE_FOR_vec_unpacks_lo_v32qi = 6820,
  CODE_FOR_vec_unpacks_lo_v16qi = 6821,
  CODE_FOR_vec_unpacks_lo_v32hi = 6822,
  CODE_FOR_vec_unpacks_lo_v16hi = 6823,
  CODE_FOR_vec_unpacks_lo_v8hi = 6824,
  CODE_FOR_vec_unpacks_lo_v16si = 6825,
  CODE_FOR_vec_unpacks_lo_v8si = 6826,
  CODE_FOR_vec_unpacks_lo_v4si = 6827,
  CODE_FOR_vec_unpacks_hi_v64qi = 6828,
  CODE_FOR_vec_unpacks_hi_v32qi = 6829,
  CODE_FOR_vec_unpacks_hi_v16qi = 6830,
  CODE_FOR_vec_unpacks_hi_v32hi = 6831,
  CODE_FOR_vec_unpacks_hi_v16hi = 6832,
  CODE_FOR_vec_unpacks_hi_v8hi = 6833,
  CODE_FOR_vec_unpacks_hi_v16si = 6834,
  CODE_FOR_vec_unpacks_hi_v8si = 6835,
  CODE_FOR_vec_unpacks_hi_v4si = 6836,
  CODE_FOR_vec_unpacku_lo_v64qi = 6837,
  CODE_FOR_vec_unpacku_lo_v32qi = 6838,
  CODE_FOR_vec_unpacku_lo_v16qi = 6839,
  CODE_FOR_vec_unpacku_lo_v32hi = 6840,
  CODE_FOR_vec_unpacku_lo_v16hi = 6841,
  CODE_FOR_vec_unpacku_lo_v8hi = 6842,
  CODE_FOR_vec_unpacku_lo_v16si = 6843,
  CODE_FOR_vec_unpacku_lo_v8si = 6844,
  CODE_FOR_vec_unpacku_lo_v4si = 6845,
  CODE_FOR_vec_unpacku_hi_v64qi = 6846,
  CODE_FOR_vec_unpacku_hi_v32qi = 6847,
  CODE_FOR_vec_unpacku_hi_v16qi = 6848,
  CODE_FOR_vec_unpacku_hi_v32hi = 6849,
  CODE_FOR_vec_unpacku_hi_v16hi = 6850,
  CODE_FOR_vec_unpacku_hi_v8hi = 6851,
  CODE_FOR_vec_unpacku_hi_v16si = 6852,
  CODE_FOR_vec_unpacku_hi_v8si = 6853,
  CODE_FOR_vec_unpacku_hi_v4si = 6854,
  CODE_FOR_avx512bw_uavgv64qi3 = 6855,
  CODE_FOR_avx512bw_uavgv64qi3_mask = 6856,
  CODE_FOR_avx2_uavgv32qi3 = 6857,
  CODE_FOR_avx2_uavgv32qi3_mask = 6858,
  CODE_FOR_sse2_uavgv16qi3 = 6859,
  CODE_FOR_sse2_uavgv16qi3_mask = 6860,
  CODE_FOR_avx512bw_uavgv32hi3 = 6861,
  CODE_FOR_avx512bw_uavgv32hi3_mask = 6862,
  CODE_FOR_avx2_uavgv16hi3 = 6863,
  CODE_FOR_avx2_uavgv16hi3_mask = 6864,
  CODE_FOR_sse2_uavgv8hi3 = 6865,
  CODE_FOR_sse2_uavgv8hi3_mask = 6866,
  CODE_FOR_sse2_maskmovdqu = 6867,
  CODE_FOR_ssse3_pmulhrswv4hi3_mask = 6868,
  CODE_FOR_ssse3_pmulhrswv8hi3_mask = 6869,
  CODE_FOR_avx2_pmulhrswv16hi3_mask = 6870,
  CODE_FOR_ssse3_pmulhrswv4hi3 = 6871,
  CODE_FOR_ssse3_pmulhrswv8hi3 = 6872,
  CODE_FOR_avx2_pmulhrswv16hi3 = 6873,
  CODE_FOR_absv64qi2 = 6874,
  CODE_FOR_absv32qi2 = 6875,
  CODE_FOR_absv16qi2 = 6876,
  CODE_FOR_absv32hi2 = 6877,
  CODE_FOR_absv16hi2 = 6878,
  CODE_FOR_absv8hi2 = 6879,
  CODE_FOR_absv16si2 = 6880,
  CODE_FOR_absv8si2 = 6881,
  CODE_FOR_absv4si2 = 6882,
  CODE_FOR_absv8di2 = 6883,
  CODE_FOR_absv4di2 = 6884,
  CODE_FOR_absv2di2 = 6885,
  CODE_FOR_avx2_pblendw = 6886,
  CODE_FOR_avx_roundps_sfix256 = 6887,
  CODE_FOR_sse4_1_roundps_sfix = 6888,
  CODE_FOR_avx512f_roundpd512 = 6889,
  CODE_FOR_avx512f_roundpd_vec_pack_sfix512 = 6890,
  CODE_FOR_avx_roundpd_vec_pack_sfix256 = 6891,
  CODE_FOR_sse4_1_roundpd_vec_pack_sfix = 6892,
  CODE_FOR_roundv16sf2 = 6893,
  CODE_FOR_roundv8sf2 = 6894,
  CODE_FOR_roundv4sf2 = 6895,
  CODE_FOR_roundv8df2 = 6896,
  CODE_FOR_roundv4df2 = 6897,
  CODE_FOR_roundv2df2 = 6898,
  CODE_FOR_roundv8sf2_sfix = 6899,
  CODE_FOR_roundv4sf2_sfix = 6900,
  CODE_FOR_roundv8df2_vec_pack_sfix = 6901,
  CODE_FOR_roundv4df2_vec_pack_sfix = 6902,
  CODE_FOR_roundv2df2_vec_pack_sfix = 6903,
  CODE_FOR_avx512pf_gatherpfv16sisf = 6908,
  CODE_FOR_avx512pf_gatherpfv8disf = 6909,
  CODE_FOR_avx512pf_gatherpfv8sidf = 6910,
  CODE_FOR_avx512pf_gatherpfv8didf = 6911,
  CODE_FOR_avx512pf_scatterpfv16sisf = 6912,
  CODE_FOR_avx512pf_scatterpfv8disf = 6913,
  CODE_FOR_avx512pf_scatterpfv8sidf = 6914,
  CODE_FOR_avx512pf_scatterpfv8didf = 6915,
  CODE_FOR_rotlv16qi3 = 6916,
  CODE_FOR_rotlv8hi3 = 6917,
  CODE_FOR_rotlv4si3 = 6918,
  CODE_FOR_rotlv2di3 = 6919,
  CODE_FOR_rotrv16qi3 = 6920,
  CODE_FOR_rotrv8hi3 = 6921,
  CODE_FOR_rotrv4si3 = 6922,
  CODE_FOR_rotrv2di3 = 6923,
  CODE_FOR_vrotrv16qi3 = 6924,
  CODE_FOR_vrotrv8hi3 = 6925,
  CODE_FOR_vrotrv4si3 = 6926,
  CODE_FOR_vrotrv2di3 = 6927,
  CODE_FOR_vrotlv16qi3 = 6928,
  CODE_FOR_vrotlv8hi3 = 6929,
  CODE_FOR_vrotlv4si3 = 6930,
  CODE_FOR_vrotlv2di3 = 6931,
  CODE_FOR_vlshrv16qi3 = 6932,
  CODE_FOR_vlshrv8hi3 = 6933,
  CODE_FOR_vlshrv4si3 = 6934,
  CODE_FOR_vlshrv2di3 = 6935,
  CODE_FOR_vlshrv16si3 = 6936,
  CODE_FOR_vlshrv8di3 = 6937,
  CODE_FOR_vlshrv8si3 = 6938,
  CODE_FOR_vlshrv4di3 = 6939,
  CODE_FOR_vashrv8hi3 = 6940,
  CODE_FOR_vashrv8hi3_mask = 6941,
  CODE_FOR_vashrv16qi3 = 6942,
  CODE_FOR_vashrv2di3 = 6943,
  CODE_FOR_vashrv2di3_mask = 6944,
  CODE_FOR_vashrv4si3 = 6945,
  CODE_FOR_vashrv16si3 = 6946,
  CODE_FOR_vashrv8si3 = 6947,
  CODE_FOR_vashlv16qi3 = 6948,
  CODE_FOR_vashlv8hi3 = 6949,
  CODE_FOR_vashlv4si3 = 6950,
  CODE_FOR_vashlv2di3 = 6951,
  CODE_FOR_vashlv16si3 = 6952,
  CODE_FOR_vashlv8di3 = 6953,
  CODE_FOR_vashlv8si3 = 6954,
  CODE_FOR_vashlv4di3 = 6955,
  CODE_FOR_ashlv64qi3 = 6956,
  CODE_FOR_lshrv64qi3 = 6957,
  CODE_FOR_ashrv64qi3 = 6958,
  CODE_FOR_ashlv32qi3 = 6959,
  CODE_FOR_lshrv32qi3 = 6960,
  CODE_FOR_ashrv32qi3 = 6961,
  CODE_FOR_ashlv16qi3 = 6962,
  CODE_FOR_lshrv16qi3 = 6963,
  CODE_FOR_ashrv16qi3 = 6964,
  CODE_FOR_ashrv2di3 = 6965,
  CODE_FOR_xop_vmfrczv4sf2 = 6966,
  CODE_FOR_xop_vmfrczv2df2 = 6967,
  CODE_FOR_avx_vzeroall = 6968,
  CODE_FOR_avx2_permv4di = 6969,
  CODE_FOR_avx2_permv4df = 6970,
  CODE_FOR_avx512f_permv8di = 6971,
  CODE_FOR_avx512f_permv8df = 6972,
  CODE_FOR_avx512vl_permv4di_mask = 6973,
  CODE_FOR_avx512vl_permv4df_mask = 6974,
  CODE_FOR_avx512f_permv8di_mask = 6975,
  CODE_FOR_avx512f_permv8df_mask = 6976,
  CODE_FOR_avx512f_vpermilv8df = 6989,
  CODE_FOR_avx512f_vpermilv8df_mask = 6990,
  CODE_FOR_avx_vpermilv4df = 6991,
  CODE_FOR_avx_vpermilv4df_mask = 6992,
  CODE_FOR_avx_vpermilv2df = 6993,
  CODE_FOR_avx_vpermilv2df_mask = 6994,
  CODE_FOR_avx512f_vpermilv16sf = 6995,
  CODE_FOR_avx512f_vpermilv16sf_mask = 6996,
  CODE_FOR_avx_vpermilv8sf = 6997,
  CODE_FOR_avx_vpermilv8sf_mask = 6998,
  CODE_FOR_avx_vpermilv4sf = 6999,
  CODE_FOR_avx_vpermilv4sf_mask = 7000,
  CODE_FOR_avx512f_vpermi2varv16si3_maskz = 7001,
  CODE_FOR_avx512f_vpermi2varv16sf3_maskz = 7002,
  CODE_FOR_avx512f_vpermi2varv8di3_maskz = 7003,
  CODE_FOR_avx512f_vpermi2varv8df3_maskz = 7004,
  CODE_FOR_avx512vl_vpermi2varv8si3_maskz = 7005,
  CODE_FOR_avx512vl_vpermi2varv8sf3_maskz = 7006,
  CODE_FOR_avx512vl_vpermi2varv4di3_maskz = 7007,
  CODE_FOR_avx512vl_vpermi2varv4df3_maskz = 7008,
  CODE_FOR_avx512vl_vpermi2varv4si3_maskz = 7009,
  CODE_FOR_avx512vl_vpermi2varv4sf3_maskz = 7010,
  CODE_FOR_avx512vl_vpermi2varv2di3_maskz = 7011,
  CODE_FOR_avx512vl_vpermi2varv2df3_maskz = 7012,
  CODE_FOR_avx512bw_vpermi2varv64qi3_maskz = 7013,
  CODE_FOR_avx512vl_vpermi2varv16qi3_maskz = 7014,
  CODE_FOR_avx512vl_vpermi2varv32qi3_maskz = 7015,
  CODE_FOR_avx512vl_vpermi2varv8hi3_maskz = 7016,
  CODE_FOR_avx512vl_vpermi2varv16hi3_maskz = 7017,
  CODE_FOR_avx512bw_vpermi2varv32hi3_maskz = 7018,
  CODE_FOR_avx512f_vpermt2varv16si3_maskz = 7019,
  CODE_FOR_avx512f_vpermt2varv16sf3_maskz = 7020,
  CODE_FOR_avx512f_vpermt2varv8di3_maskz = 7021,
  CODE_FOR_avx512f_vpermt2varv8df3_maskz = 7022,
  CODE_FOR_avx512vl_vpermt2varv8si3_maskz = 7023,
  CODE_FOR_avx512vl_vpermt2varv8sf3_maskz = 7024,
  CODE_FOR_avx512vl_vpermt2varv4di3_maskz = 7025,
  CODE_FOR_avx512vl_vpermt2varv4df3_maskz = 7026,
  CODE_FOR_avx512vl_vpermt2varv4si3_maskz = 7027,
  CODE_FOR_avx512vl_vpermt2varv4sf3_maskz = 7028,
  CODE_FOR_avx512vl_vpermt2varv2di3_maskz = 7029,
  CODE_FOR_avx512vl_vpermt2varv2df3_maskz = 7030,
  CODE_FOR_avx512bw_vpermt2varv64qi3_maskz = 7031,
  CODE_FOR_avx512vl_vpermt2varv16qi3_maskz = 7032,
  CODE_FOR_avx512vl_vpermt2varv32qi3_maskz = 7033,
  CODE_FOR_avx512vl_vpermt2varv8hi3_maskz = 7034,
  CODE_FOR_avx512vl_vpermt2varv16hi3_maskz = 7035,
  CODE_FOR_avx512bw_vpermt2varv32hi3_maskz = 7036,
  CODE_FOR_avx_vperm2f128v8si3 = 7037,
  CODE_FOR_avx_vperm2f128v8sf3 = 7038,
  CODE_FOR_avx_vperm2f128v4df3 = 7039,
  CODE_FOR_avx512vl_vinsertv8si = 7040,
  CODE_FOR_avx512vl_vinsertv8sf = 7041,
  CODE_FOR_avx512vl_vinsertv4di = 7042,
  CODE_FOR_avx512vl_vinsertv4df = 7043,
  CODE_FOR_avx_vinsertf128v32qi = 7044,
  CODE_FOR_avx_vinsertf128v16hi = 7045,
  CODE_FOR_avx_vinsertf128v8si = 7046,
  CODE_FOR_avx_vinsertf128v4di = 7047,
  CODE_FOR_avx_vinsertf128v8sf = 7048,
  CODE_FOR_avx_vinsertf128v4df = 7049,
  CODE_FOR_maskloadv4sf = 7050,
  CODE_FOR_maskloadv2df = 7051,
  CODE_FOR_maskloadv8sf = 7052,
  CODE_FOR_maskloadv4df = 7053,
  CODE_FOR_maskloadv4si = 7054,
  CODE_FOR_maskloadv2di = 7055,
  CODE_FOR_maskloadv8si = 7056,
  CODE_FOR_maskloadv4di = 7057,
  CODE_FOR_maskstorev4sf = 7058,
  CODE_FOR_maskstorev2df = 7059,
  CODE_FOR_maskstorev8sf = 7060,
  CODE_FOR_maskstorev4df = 7061,
  CODE_FOR_maskstorev4si = 7062,
  CODE_FOR_maskstorev2di = 7063,
  CODE_FOR_maskstorev8si = 7064,
  CODE_FOR_maskstorev4di = 7065,
  CODE_FOR_vec_initv32qi = 7069,
  CODE_FOR_vec_initv16hi = 7070,
  CODE_FOR_vec_initv8si = 7071,
  CODE_FOR_vec_initv4di = 7072,
  CODE_FOR_vec_initv8sf = 7073,
  CODE_FOR_vec_initv4df = 7074,
  CODE_FOR_vec_initv16si = 7075,
  CODE_FOR_vec_initv16sf = 7076,
  CODE_FOR_vec_initv8di = 7077,
  CODE_FOR_vec_initv8df = 7078,
  CODE_FOR_vec_initv32hi = 7079,
  CODE_FOR_vec_initv64qi = 7080,
  CODE_FOR_vcvtps2ph_mask = 7081,
  CODE_FOR_vcvtps2ph = 7082,
  CODE_FOR_avx2_gathersiv2di = 7083,
  CODE_FOR_avx2_gathersiv2df = 7084,
  CODE_FOR_avx2_gathersiv4di = 7085,
  CODE_FOR_avx2_gathersiv4df = 7086,
  CODE_FOR_avx2_gathersiv4si = 7087,
  CODE_FOR_avx2_gathersiv4sf = 7088,
  CODE_FOR_avx2_gathersiv8si = 7089,
  CODE_FOR_avx2_gathersiv8sf = 7090,
  CODE_FOR_avx2_gatherdiv2di = 7091,
  CODE_FOR_avx2_gatherdiv2df = 7092,
  CODE_FOR_avx2_gatherdiv4di = 7093,
  CODE_FOR_avx2_gatherdiv4df = 7094,
  CODE_FOR_avx2_gatherdiv4si = 7095,
  CODE_FOR_avx2_gatherdiv4sf = 7096,
  CODE_FOR_avx2_gatherdiv8si = 7097,
  CODE_FOR_avx2_gatherdiv8sf = 7098,
  CODE_FOR_avx512f_gathersiv16si = 7099,
  CODE_FOR_avx512f_gathersiv16sf = 7100,
  CODE_FOR_avx512f_gathersiv8di = 7101,
  CODE_FOR_avx512f_gathersiv8df = 7102,
  CODE_FOR_avx512vl_gathersiv8si = 7103,
  CODE_FOR_avx512vl_gathersiv8sf = 7104,
  CODE_FOR_avx512vl_gathersiv4di = 7105,
  CODE_FOR_avx512vl_gathersiv4df = 7106,
  CODE_FOR_avx512vl_gathersiv4si = 7107,
  CODE_FOR_avx512vl_gathersiv4sf = 7108,
  CODE_FOR_avx512vl_gathersiv2di = 7109,
  CODE_FOR_avx512vl_gathersiv2df = 7110,
  CODE_FOR_avx512f_gatherdiv16si = 7111,
  CODE_FOR_avx512f_gatherdiv16sf = 7112,
  CODE_FOR_avx512f_gatherdiv8di = 7113,
  CODE_FOR_avx512f_gatherdiv8df = 7114,
  CODE_FOR_avx512vl_gatherdiv8si = 7115,
  CODE_FOR_avx512vl_gatherdiv8sf = 7116,
  CODE_FOR_avx512vl_gatherdiv4di = 7117,
  CODE_FOR_avx512vl_gatherdiv4df = 7118,
  CODE_FOR_avx512vl_gatherdiv4si = 7119,
  CODE_FOR_avx512vl_gatherdiv4sf = 7120,
  CODE_FOR_avx512vl_gatherdiv2di = 7121,
  CODE_FOR_avx512vl_gatherdiv2df = 7122,
  CODE_FOR_avx512f_scattersiv16si = 7123,
  CODE_FOR_avx512f_scattersiv16sf = 7124,
  CODE_FOR_avx512f_scattersiv8di = 7125,
  CODE_FOR_avx512f_scattersiv8df = 7126,
  CODE_FOR_avx512vl_scattersiv8si = 7127,
  CODE_FOR_avx512vl_scattersiv8sf = 7128,
  CODE_FOR_avx512vl_scattersiv4di = 7129,
  CODE_FOR_avx512vl_scattersiv4df = 7130,
  CODE_FOR_avx512vl_scattersiv4si = 7131,
  CODE_FOR_avx512vl_scattersiv4sf = 7132,
  CODE_FOR_avx512vl_scattersiv2di = 7133,
  CODE_FOR_avx512vl_scattersiv2df = 7134,
  CODE_FOR_avx512f_scatterdiv16si = 7135,
  CODE_FOR_avx512f_scatterdiv16sf = 7136,
  CODE_FOR_avx512f_scatterdiv8di = 7137,
  CODE_FOR_avx512f_scatterdiv8df = 7138,
  CODE_FOR_avx512vl_scatterdiv8si = 7139,
  CODE_FOR_avx512vl_scatterdiv8sf = 7140,
  CODE_FOR_avx512vl_scatterdiv4di = 7141,
  CODE_FOR_avx512vl_scatterdiv4df = 7142,
  CODE_FOR_avx512vl_scatterdiv4si = 7143,
  CODE_FOR_avx512vl_scatterdiv4sf = 7144,
  CODE_FOR_avx512vl_scatterdiv2di = 7145,
  CODE_FOR_avx512vl_scatterdiv2df = 7146,
  CODE_FOR_avx512f_expandv16si_maskz = 7147,
  CODE_FOR_avx512f_expandv16sf_maskz = 7148,
  CODE_FOR_avx512f_expandv8di_maskz = 7149,
  CODE_FOR_avx512f_expandv8df_maskz = 7150,
  CODE_FOR_avx512vl_expandv8si_maskz = 7151,
  CODE_FOR_avx512vl_expandv8sf_maskz = 7152,
  CODE_FOR_avx512vl_expandv4di_maskz = 7153,
  CODE_FOR_avx512vl_expandv4df_maskz = 7154,
  CODE_FOR_avx512vl_expandv4si_maskz = 7155,
  CODE_FOR_avx512vl_expandv4sf_maskz = 7156,
  CODE_FOR_avx512vl_expandv2di_maskz = 7157,
  CODE_FOR_avx512vl_expandv2df_maskz = 7158,
  CODE_FOR_vpamdd52huqv8di_maskz = 7165,
  CODE_FOR_vpamdd52huqv4di_maskz = 7166,
  CODE_FOR_vpamdd52huqv2di_maskz = 7167,
  CODE_FOR_vpamdd52luqv8di_maskz = 7168,
  CODE_FOR_vpamdd52luqv4di_maskz = 7169,
  CODE_FOR_vpamdd52luqv2di_maskz = 7170,
  CODE_FOR_sse2_lfence = 7171,
  CODE_FOR_sse_sfence = 7172,
  CODE_FOR_sse2_mfence = 7173,
  CODE_FOR_mem_thread_fence = 7174,
  CODE_FOR_atomic_loadqi = 7175,
  CODE_FOR_atomic_loadhi = 7176,
  CODE_FOR_atomic_loadsi = 7177,
  CODE_FOR_atomic_loaddi = 7178,
  CODE_FOR_atomic_storeqi = 7180,
  CODE_FOR_atomic_storehi = 7181,
  CODE_FOR_atomic_storesi = 7182,
  CODE_FOR_atomic_storedi = 7183,
  CODE_FOR_atomic_compare_and_swapqi = 7185,
  CODE_FOR_atomic_compare_and_swaphi = 7186,
  CODE_FOR_atomic_compare_and_swapsi = 7187,
  CODE_FOR_atomic_compare_and_swapdi = 7188,
#define CODE_FOR_atomic_compare_and_swapti CODE_FOR_nothing
  LAST_INSN_CODE = 7190
};

#endif /* GCC_INSN_CODES_H */
